[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.20.1701180956330.3464@nanos>
Date: Wed, 18 Jan 2017 10:01:37 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Shivappa Vikas <vikas.shivappa@...el.com>
cc: Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
linux-kernel@...r.kernel.org, x86@...nel.org, hpa@...or.com,
mingo@...nel.org, peterz@...radead.org, ravi.v.shankar@...el.com,
tony.luck@...el.com, fenghua.yu@...el.com, h.peter.anvin@...el.com
Subject: Re: [PATCH 1/8] Documentation, x86: Documentation for Intel Mem b/w
allocation user interface
On Tue, 17 Jan 2017, Shivappa Vikas wrote:
> On Mon, 16 Jan 2017, Thomas Gleixner wrote:
> > This interface is really crap. The natural way to express it is:
> >
> > Requested Bandwidth = X %
>
> I wanted to do it this way which did seem more intuitive but the issue is with
> the non-linear scale which the hardware does not guarantee a particular
> percentage for a particular value. Or we don't know the curve for delay value
> vs. actual b/w throttled.
>
> ex: in non linear scale , the granularity is 2^n.
> Max : 512
>
> Say a value of 256 is not guaranteed to have 50% or even follow a curve where
> we can calculate the corresponding percentage.
The question is whether this non linear scale thing is just a first
implementation attempt and any sane hardware in the future will use the
percentage value (which is an approximation as well).
If that non-linear scale is not going to be prevalent, then we really can
live with the fallout of a particular CPU type.
If it's going to stay, then Intel should be able to provide simple tables
which give us the required information for a particular CPU model.
Thanks,
tglx
Powered by blists - more mailing lists