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Message-ID: <a1970005-949d-a08d-d0d5-da0cc2ac618c@intel.com>
Date: Thu, 19 Jan 2017 12:05:39 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: Ritesh Harjani <riteshh@...eaurora.org>, ulf.hansson@...aro.org
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
shawn.lin@...k-chips.com, linux-arm-msm@...r.kernel.org,
georgi.djakov@...aro.org, asutoshd@...eaurora.org,
stummala@...eaurora.org, venkatg@...eaurora.org,
pramod.gurav@...aro.org, jeremymc@...hat.com, git@...r.de,
Subhash Jadavani <subhashj@...eaurora.org>
Subject: Re: [RESEND PATCHv1 5/8] mmc: sdhci-msm: configure
CORE_CSR_CDC_DELAY_CFG to recommended value
On 10/01/17 09:00, Ritesh Harjani wrote:
> From: Subhash Jadavani <subhashj@...eaurora.org>
>
> Program CORE_CSR_CDC_DELAY_CFG for hardware recommended 1.25ns delay.
> We may see data CRC errors if it's programmed for any other delay
> value.
>
> Signed-off-by: Subhash Jadavani <subhashj@...eaurora.org>
> Signed-off-by: Ritesh Harjani <riteshh@...eaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@...el.com>
> ---
> drivers/mmc/host/sdhci-msm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index a028568..84d29dd 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -679,7 +679,7 @@ static int sdhci_msm_cdclp533_calibration(struct sdhci_host *host)
> writel_relaxed(0x4, host->ioaddr + CORE_CSR_CDC_CAL_TIMER_CFG1);
> writel_relaxed(0xCB732020, host->ioaddr + CORE_CSR_CDC_REFCOUNT_CFG);
> writel_relaxed(0xB19, host->ioaddr + CORE_CSR_CDC_COARSE_CAL_CFG);
> - writel_relaxed(0x3AC, host->ioaddr + CORE_CSR_CDC_DELAY_CFG);
> + writel_relaxed(0x4E2, host->ioaddr + CORE_CSR_CDC_DELAY_CFG);
> writel_relaxed(0x0, host->ioaddr + CORE_CDC_OFFSET_CFG);
> writel_relaxed(0x16334, host->ioaddr + CORE_CDC_SLAVE_DDA_CFG);
>
>
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