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Message-Id: <20170119163949.147183-7-andriy.shevchenko@linux.intel.com>
Date: Thu, 19 Jan 2017 18:39:45 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: platform-driver-x86@...r.kernel.org,
Darren Hart <dvhart@...radead.org>,
linux-kernel@...r.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Subject: [PATCH v1 06/10] platform/x86: intel_mid_powerbtn: Acknowledge interrupts
Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
drivers/platform/x86/intel_mid_powerbtn.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c
index 596ac9f3e89d..ac02a0b8bef3 100644
--- a/drivers/platform/x86/intel_mid_powerbtn.c
+++ b/drivers/platform/x86/intel_mid_powerbtn.c
@@ -94,6 +94,7 @@ static irqreturn_t mid_pb_isr(int irq, void *dev_id)
input_sync(input);
}
+ ddata->ack(ddata);
return IRQ_HANDLED;
}
--
2.11.0
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