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Message-ID: <871svylmvb.fsf@weeman.i-did-not-set--mail-host-address--so-tickle-me>
Date: Thu, 19 Jan 2017 17:13:12 -0500
From: Vivien Didelot <vivien.didelot@...oirfairelinux.com>
To: Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Andrew Lunn <andrew@...n.ch>,
Florian Fainelli <f.fainelli@...il.com>,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: "David S. Miller" <davem@...emloft.net>,
Jason Cooper <jason@...edaemon.net>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Gregory CLEMENT <gregory.clement@...e-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org,
Nadav Haklai <nadavh@...vell.com>,
Wilson Ding <dingwei@...vell.com>,
Kostya Porotchkin <kostap@...vell.com>,
Joe Zhou <shjzhou@...vell.com>,
Jon Pannell <jpannell@...vell.com>
Subject: Re: [PATCH v5 1/2] net: dsa: mv88e6xxx: Don't forbid MDIO I/Os for PHY addr >= num_of_ports
Hi Gregory,
Gregory CLEMENT <gregory.clement@...e-electrons.com> writes:
> From: Romain Perier <romain.perier@...e-electrons.com>
>
> Some Marvell ethernet switches have internal ethernet transceivers with
> hardcoded phy addresses. These addresses can be greater than the number
> of ports or its value might be different than the associated port number.
> This is for example the case for MV88E6341 that has 6 ports and internal
> Port 1 to Port4 PHYs mapped at SMI addresses from 0x11 to 0x14.
Isn't there an hardware table used to map the PHY addresses on such chip?
> This commits fixes the issue by removing the condition in MDIO callbacks.
>
> Signed-off-by: Romain Perier <romain.perier@...e-electrons.com>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
> Signed-off-by: Gregory CLEMENT <gregory.clement@...e-electrons.com>
The patch is anyway still valid:
Reviewed-by: Vivien Didelot <vivien.didelot@...oirfairelinux.com>
Thanks,
Vivien
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