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Message-ID: <20170120145138.yhjngt2cxbikq32z@kozik-lap>
Date: Fri, 20 Jan 2017 16:51:38 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Andrzej Hajda <a.hajda@...sung.com>
Cc: Inki Dae <inki.dae@...sung.com>, dri-devel@...ts.freedesktop.org,
Krzysztof Kozlowski <krzk@...nel.org>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
linux-kernel@...r.kernel.org, linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH 7/7] arm64: dts: exynos: configure TV path clocks for
Ultra HD modes
On Fri, Jan 20, 2017 at 07:52:25AM +0100, Andrzej Hajda wrote:
> Ultra HD modes requires clock ticking at increased rate.
>
> Signed-off-by: Andrzej Hajda <a.hajda@...sung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index f120d99..314d928 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -764,6 +764,9 @@
> clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
> "aclk_xiu_decon0x", "pclk_smmu_decon0x",
> "sclk_decon_vclk", "sclk_decon_eclk";
> + assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
> + assigned-clock-parents = <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, <0>, <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
> + assigned-clock-rates = <0>, <400000000>;
Lines got too long, please split them.
Best regards,
Krzysztof
> samsung,disp-sysreg = <&syscon_disp>;
> interrupt-names = "fifo", "vsync", "lcd_sys";
> interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
> --
> 2.7.4
>
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