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Message-ID: <alpine.DEB.2.20.1701231959160.3836@nanos>
Date: Mon, 23 Jan 2017 20:01:26 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Shivappa Vikas <vikas.shivappa@...el.com>
cc: Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
linux-kernel@...r.kernel.org, x86@...nel.org, hpa@...or.com,
mingo@...nel.org, peterz@...radead.org, ravi.v.shankar@...el.com,
tony.luck@...el.com, fenghua.yu@...el.com, h.peter.anvin@...el.com
Subject: Re: [PATCH 1/8] Documentation, x86: Documentation for Intel Mem b/w
allocation user interface
On Mon, 23 Jan 2017, Shivappa Vikas wrote:
> On Wed, 18 Jan 2017, Thomas Gleixner wrote:
> > If it's going to stay, then Intel should be able to provide simple tables
> > which give us the required information for a particular CPU model.
>
> By sample table - does this mean we can map a throttle value in non-linear
> scale to its percentage ?
Exactly. And that map should be provided by Intel simply because it's a
royal pain in the neck if users have to map random power of 2 values to
something useful. And of course every user has to do the same thing on
their own. That'd be more than silly.
Thanks,
tglx
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