Message-ID: <1485241525-201782-1-git-send-email-yuanzhichang@hisilicon.com>
Date:   Tue, 24 Jan 2017 15:05:20 +0800
From:   "zhichang.yuan" <yuanzhichang@...ilicon.com>
To:     <catalin.marinas@....com>, <will.deacon@....com>,
        <robh+dt@...nel.org>, <frowand.list@...il.com>,
        <bhelgaas@...gle.com>, <rafael@...nel.org>, <mark.rutland@....com>,
        <brian.starkey@....com>, <olof@...om.net>, <arnd@...db.de>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <lorenzo.pieralisi@....com>, <benh@...nel.crashing.org>,
        <linux-kernel@...r.kernel.org>, <linuxarm@...wei.com>,
        <devicetree@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <linux-serial@...r.kernel.org>, <minyard@....org>,
        <liviu.dudau@....com>, <zourongrong@...il.com>,
        <john.garry@...wei.com>, <gabriele.paoloni@...wei.com>,
        <zhichang.yuan02@...il.com>, <kantyzc@....com>,
        <xuwei5@...ilicon.com>,
        "zhichang.yuan" <yuanzhichang@...ilicon.com>
Subject: [PATCH V6 0/5] LPC: legacy ISA I/O support

This patch supports the IPMI-bt device attached to the Low-Pin-Count interface
implemented on Hisilicon Hip06/Hip07 SoC.
	                -----------
			| LPC host|
	                |         |
	                -----------
	                     |
 	        _____________V_______________LPC
                  |			  |
                  V	                  V
			             ------------
			             |  BT(ipmi)|
			             ------------

When master accesses those peripherals beneath the Hip06 LPC, a specific LPC
driver is needed to make LPC host generate the standard LPC I/O cycles with
the target peripherals'I/O port addresses. But on curent arm64 world, there is
no real I/O accesses. All the I/O operations through in/out pair are based on
MMIO which is not satisfied the I/O mechanism on Hip06 LPC.
To solve this issue and keep the relevant existing peripherals' driver
untouched, this patch set redefines the in/out() pair to support both the IO
operations for Hip06 LPC and the original MMIO. The way specific to Hip06 is
named as indirect-IO in this patchset.

Changes from V5:
  - Made the extio driver more generic and locate in lib/;
  - Supported multiple indirect-IO bus instances;
  - Extended the pci_register_io_range() to support indirect-IO, then dropped
  the I/O reservation used in previous patchset;
  - Reimplemented the ACPI LPC support;
  - Fixed some bugs, including the compile error on other archs, the module
  building failure found by Ming Lei, etc;

Changes from V4:
  - Some revises based on the comments from Bjorn, Rob on V4;
  - Fixed the compile error on some platforms, such as openrisc;

Changes from V3:
  - UART support deferred to a separate patchset; This patchset only support
  ipmi device under LPC;
  - LPC bus I/O range is fixed to 0 ~ (PCIBIOS_MIN_IO - 1), which is separeted
  from PCI/PCIE PIO space;
  - Based on Arnd's remarks, removed the ranges property from Hip06 lpc dts and
  added a new fixup function, of_isa_indirect_io(), to get the I/O address
  directly from LPC dts configurations;
  - Support in(w,l)/out(w,l) for Hip06 lpc I/O;
  - Decouple the header file dependency on the gerenic io.h by defining in/out
  as normal functions in c file;
  - removed unused macro definitions in the LPC driver;

Changes from V2:
  - Support the PIO retrieval from the linux PIO generated by
  pci_address_to_pio. This method replace the 4K PIO reservation in V2;
  - Support the flat-tree earlycon;
  - Some revises based on Arnd's remarks;
  - Make sure the linux PIO range allocated to Hip06 LPC peripherals starts
  from non-ZERO;

Changes from V1:
  - Support the ACPI LPC device;
  - Optimize the dts LPC driver in ISA compatible mode;
  - Reserve the IO range below 4K in avoid the possible conflict with PCI host
  IO ranges;
  - Support the LPC uart and relevant earlycon;


v5 thread here: https://lkml.org/lkml/2016/11/7/955
v4 thread here: https://lkml.org/lkml/2016/10/20/149
v3 thread here: https://lkml.org/lkml/2016/9/14/326
v2 thread here: https://lkml.org/lkml/2016/9/7/356
v1 thread here: https://lkml.org/lkml/2015/12/29/154


Signed-off-by: Zhichang Yuan <yuanzhichang@...ilicon.com>
zhichang.yuan (5):
  LIB: Indirect ISA/LPC port IO introduced
  PCI: Adapt pci_register_io_range() for indirect-IO and PCI I/O
    translation
  OF: Add missing I/O range exception for indirect-IO devices
  LPC: Support the device-tree LPC host on Hip06/Hip07
  LPC: Add the ACPI LPC support

 .../arm/hisilicon/hisilicon-low-pin-count.txt      |  33 ++
 MAINTAINERS                                        |   9 +
 arch/arm64/boot/dts/hisilicon/hip06-d03.dts        |   4 +
 arch/arm64/boot/dts/hisilicon/hip06.dtsi           |  14 +
 drivers/acpi/pci_root.c                            |  12 +-
 drivers/bus/Kconfig                                |   8 +
 drivers/bus/Makefile                               |   1 +
 drivers/bus/hisi_lpc.c                             | 625 +++++++++++++++++++++
 drivers/of/address.c                               |  95 +++-
 drivers/pci/pci.c                                  |  44 +-
 include/asm-generic/io.h                           |  50 ++
 include/linux/extio.h                              |  89 +++
 include/linux/io.h                                 |   1 +
 include/linux/pci.h                                |   7 +-
 lib/Kconfig                                        |   8 +
 lib/Makefile                                       |   2 +
 lib/extio.c                                        | 375 +++++++++++++
 17 files changed, 1342 insertions(+), 35 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt
 create mode 100644 drivers/bus/hisi_lpc.c
 create mode 100644 include/linux/extio.h
 create mode 100644 lib/extio.c

-- 
1.9.1

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