linux-kernel - Re: [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <215ff33d-29a2-e340-9ce9-8c623a11575c@atmel.com>
Date:   Mon, 30 Jan 2017 14:04:39 +0100
From:   Cyrille Pitchen <cyrille.pitchen@...el.com>
To:     John Crispin <john@...ozen.org>,
        Marek Vasut <marek.vasut@...il.com>
CC:     <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        "Larry D. Pinney" <ldpinney@...il.com>
Subject: Re: [PATCH V2 3/3] mtd: spi-nor: add support for ESMT_f25l32qa and
 ESMT_f25l64qa

Hi all,

Le 21/12/2016 à 08:23, John Crispin a écrit :
> From: "Larry D. Pinney" <ldpinney@...il.com>
> 
> Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
> These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
> Technology
> 
> Acked-by: Marek Vasut <marex@...x.de>
> Signed-off-by: John Crispin <john@...ozen.org>
> Signed-off-by: Larry D. Pinney <ldpinney@...il.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c |    2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index bfff159..2b150b5 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -821,6 +821,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
>  
>  	/* ESMT */
>  	{ "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) },
> +	{ "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, SECT_4K) },
> +	{ "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K) },
>  

This patch cannot be applied to the github spi-nor tree.
Another recent patch [1] has updated the "f25l32pa" entry to add the
SPI_NOR_HAS_LOCK flag. I guess the "f25l{32|64}qa" entries need this flag
as well.

[1] on the spi-nor tree, commit 252c36bb9c7b ("mtd: spi-nor: Add
lock/unlock support for f25l32pa")

Best regards,

Cyrille


>  	/* Everspin */
>  	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
>