linux-kernel - Re: [PATCH v2 1/9] drivers: pinctrl: add driver for Allwinner H5 SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <CACRpkdY=+wAVZtWjeW+jKq_s+YX17L7xUeZ14_sAyd8KCm6+kg@mail.gmail.com>
Date:   Mon, 30 Jan 2017 16:13:50 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Icenowy Zheng <icenowy@...c.xyz>
Cc:     Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Vinod Koul <vinod.koul@...el.com>,
        Mark Brown <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Andre Przywara <andre.przywara@....com>,
        linux-clk <linux-clk@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        dmaengine@...r.kernel.org,
        "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [PATCH v2 1/9] drivers: pinctrl: add driver for Allwinner H5 SoC

On Thu, Jan 26, 2017 at 4:48 PM, Icenowy Zheng <icenowy@...c.xyz> wrote:

> Based on the Allwinner H5 datasheet and the pinctrl driver of the
> backward-compatible H3 this introduces the pin multiplex assignments for
> the H5 SoC.
>
> H5 introduced some more pin functions (e.g. three more groups of TS
> pins, and one more groups of SIM pins) than H3.
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>
> ---
> Changes in v2:
> - Fixed interrupt banks. (There's one more GPIO banks (PF) that can do
>   interrupt handling on H5)

Patch applied with Maxime's ACK.

Yours,
Linus Walleij