lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 31 Jan 2017 14:33:29 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     LKML <linux-kernel@...r.kernel.org>
cc:     x86@...nel.org, Borislav Petkov <bp@...en8.de>,
        Erik Veijola <erik.veijola@...el.com>,
        Tony Luck <tony.luck@...el.com>
Subject: Re: [PATCH] x86/mce: Make timer handling more robust

On Tue, 31 Jan 2017, Thomas Gleixner wrote:
> +static void mce_start_timer(struct timer_list *t)
>  {
>  	unsigned long iv = check_interval * HZ;
>  
>  	if (mca_cfg.ignore_ce || !iv)
>  		return;
>  
> -	per_cpu(mce_next_interval, cpu) = iv;
> -
> -	t->expires = round_jiffies(jiffies + iv);
> -	add_timer_on(t, cpu);
> +	this_cpu_write(mce_next_interval, iv);
> +	__start_timer(t, jiffies + iv);

Bah. That's wrong. Delta patch below:

--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1782,7 +1782,7 @@ static void mce_start_timer(struct timer
 		return;
 
 	this_cpu_write(mce_next_interval, iv);
-	__start_timer(t, jiffies + iv);
+	__start_timer(t, iv);
 }
 
 static void __mcheck_cpu_setup_timer(void)


Powered by blists - more mailing lists