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Message-ID: <01fe1af463c640a8bd48e45c2752b52c@svr-chch-ex1.atlnz.lc>
Date: Wed, 1 Feb 2017 23:46:23 +0000
From: Chris Packham <Chris.Packham@...iedtelesis.co.nz>
To: Borislav Petkov <bp@...en8.de>
CC: "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"morbidrsa@...il.com" <morbidrsa@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
"Benjamin Herrenschmidt" <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
On 02/02/17 12:28, Borislav Petkov wrote:
> On Thu, Feb 02, 2017 at 12:16:24PM +1300, Chris Packham wrote:
>> The l2-cache controller on the T2080 SoC has similar capabilities to the
>> others already supported by the mpc85xx_edac driver. Add it to the list
>> of compatible devices.
>>
>> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
>> Acked-by: Johannes Thumshirn <jth@...nel.org>
>> ---
>> This is a resend of a patch that got an ack[1] but didn't seem to get
>> picked up.
>>
>> [1] http://marc.info/?l=linux-edac&m=148042072225488&w=2
>>
>> Changes since v1:
>> - Collect ack from Johannes.
>
> Whoops, my bad. Sorry about that.
>
>> arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 +
>> drivers/edac/mpc85xx_edac.c | 1 +
>> 2 files changed, 2 insertions(+)
>>
>> diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
>> index c744569a20e1..a97296c64eb2 100644
>> --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
>> @@ -678,5 +678,6 @@
>> compatible = "fsl,t2080-l2-cache-controller";
>> reg = <0xc20000 0x40000>;
>> next-level-cache = <&cpc>;
>> + interrupts = <16 2 1 9>;
>> };
>> };
>> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
>> index 8f66cbed70b7..67f7bc3fe5b3 100644
>> --- a/drivers/edac/mpc85xx_edac.c
>> +++ b/drivers/edac/mpc85xx_edac.c
>> @@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = {
>> { .compatible = "fsl,p1020-l2-cache-controller", },
>> { .compatible = "fsl,p1021-l2-cache-controller", },
>> { .compatible = "fsl,p2020-l2-cache-controller", },
>> + { .compatible = "fsl,t2080-l2-cache-controller", },
>
> WARNING: DT compatible string "fsl,t2080-l2-cache-controller" appears un-documented -- check ./Documentation/devicetree/bindings/
> #58: FILE: drivers/edac/mpc85xx_edac.c:632:
> + { .compatible = "fsl,t2080-l2-cache-controller", },
>
> What is checkpatch.pl trying to tell me here?
>
checpkatch.pl is confused by
Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt which says
- compatible : Should include "fsl,chip-l2-cache-controller" and "cache"
where chip is the processor (bsc9132, npc8572 etc.)
So none of the fsl cache controllers pass the checkpatch.pl test.
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