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Message-ID: <1486383336-16892-2-git-send-email-mars.cheng@mediatek.com>
Date: Mon, 6 Feb 2017 20:15:27 +0800
From: Mars Cheng <mars.cheng@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>
CC: CC Hwang <cc.hwang@...iatek.com>,
Loda Chou <loda.chou@...iatek.com>,
Miles Chen <miles.chen@...iatek.com>,
Jades Shih <jades.shih@...iatek.com>,
Yingjoe Chen <yingjoe.chen@...iatek.com>,
My Chuang <my.chuang@...iatek.com>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<wsd_upstream@...iatek.com>, Marc Zyngier <marc.zyngier@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Will Deacon <will.deacon@....com>,
Stephen Boyd <sboyd@...eaurora.org>,
<linux-clk@...r.kernel.org>,
Chieh-Jay Liu <Chieh-Jay.Liu@...iatek.com>,
Mars Cheng <mars.cheng@...iatek.com>
Subject: [PATCH v2 01/10] Document: DT: mediatek: multiple base address support for sysirq
This describes how to specify multiple base addresses for sysirq
in mediatek platforms.
Signed-off-by: Mars Cheng <mars.cheng@...iatek.com>
---
.../interrupt-controller/mediatek,sysirq.txt | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
index 9d1d72c..1718454 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
@@ -18,16 +18,21 @@ Required properties:
"mediatek,mt2701-sysirq"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
+- #intpol-bases: Indicate how many base addresses to be used, default is 1.
- interrupt-parent: phandle of irq parent for sysirq. The parent must
use the same interrupt-cells format as GIC.
- reg: Physical base address of the intpol registers and length of memory
- mapped region.
+ mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
+ need 1. If not set, the default is 1.
Example:
- sysirq: interrupt-controller@...00100 {
- compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq";
+ sysirq: intpol-controller@...00620 {
+ compatible = "mediatek,mt6797-sysirq",
+ "mediatek,mt6577-sysirq";
interrupt-controller;
#interrupt-cells = <3>;
+ #intpol-bases = <2>;
interrupt-parent = <&gic>;
- reg = <0 0x10200100 0 0x1c>;
+ reg = <0 0x10220620 0 0x20>,
+ <0 0x10220690 0 0x10>;
};
--
1.7.9.5
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