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Message-ID: <CAHp75VcgGQQXMh-7YLvE0qwmoLsZio=RuXusquw+YgRKO7CEkw@mail.gmail.com>
Date: Tue, 7 Feb 2017 11:18:52 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Hoan Tran <hotran@....com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Jamie Iles <jamie@...ieiles.com>,
Weike Chen <alvin.chen@...el.com>,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Alexandre Courbot <gnurou@...il.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Loc Ho <lho@....com>, Duc Dang <dhdang@....com>
Subject: Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC
On Tue, Feb 7, 2017 at 1:49 AM, Hoan Tran <hotran@....com> wrote:
>> I wonder what is at addresses 0x08, 0x14, 0x20, 0x2c, 0x44?
>
> They are unused registers.
> - 0x8, 0x14, 0x20, 0x2c are port data source registers.
> - 0x44 is the raw interrupt status register.
>
>> Anything interesting we should know about? I bet they are not just
>> dead address space.
Sometimes they are (for example Synopsys DW DMA has few holes in address space).
>> Is there a public datasheet for this thing that I can look at?
>
> I don't know if they public this datasheet. You can register and
> download from here
> https://www.synopsys.com/dw/ipdir.php?c=DW_apb_gpio
Intel Quark x1000 SoC specification, which is public, at least sheds a
light on 0x44 (from above list). It has description of other used
registers (regarding to only one portA).
http://www.intel.me/content/www/xr/ar/embedded/products/quark/quark-x1000-datasheet.html
--
With Best Regards,
Andy Shevchenko
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