linux-kernel - Re: [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC

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Date:   Tue, 7 Feb 2017 16:56:05 +0100
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Icenowy Zheng <icenowy@...c.xyz>
Cc:     Jaroslav Kysela <perex@...ex.cz>,
        Vinod Koul <vinod.koul@...el.com>, linux-gpio@...r.kernel.org,
        dmaengine@...r.kernel.org, Chen-Yu Tsai <wens@...e.org>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        Andre Przywara <andre.przywara@....com>,
        devicetree@...r.kernel.org, Mark Brown <broonie@...nel.org>,
        alsa-devel@...a-project.org,
        Linus Walleij <linus.walleij@...aro.org>,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com
Subject: Re: [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support
 for Allwinner H5 SoC

On Mon, Jan 30, 2017 at 10:02:04PM +0800, Icenowy Zheng wrote:
> > >  static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { 
> > >  [RST_USB_PHY0] =  { 0x0cc, BIT(0) }, 
> > >  [RST_USB_PHY1] =  { 0x0cc, BIT(1) }, 
> > > @@ -791,6 +910,7 @@ static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { 
> > >  [RST_BUS_UART2] =  { 0x2d8, BIT(18) }, 
> > >  [RST_BUS_UART3] =  { 0x2d8, BIT(19) }, 
> > >  [RST_BUS_SCR0] =  { 0x2d8, BIT(20) }, 
> > > + [RST_BUS_SCR1] =  { 0x2d8, BIT(21) }, 
> >
> > That reset line is not valid on the H3. 
> 
> So I should split a H3 reset array and a H5 one?

Ideally, yes.

> (I modelled after ccu-sun5i.c, which shares one reset array)

They all share the same reset lines.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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