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Message-ID: <0262b9d0-1fd1-ff56-a7c5-b9ab9dcea9a8@codeaurora.org>
Date:   Tue, 7 Feb 2017 22:31:15 -0600
From:   Shanker Donthineni <shankerd@...eaurora.org>
To:     Timur Tabi <timur@...eaurora.org>,
        Christopher Covington <cov@...eaurora.org>,
        Jonathan Corbet <corbet@....net>,
        Marc Zyngier <marc.zyngier@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>, linux-doc@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Mark Rutland <mark.rutland@....com>,
        linux-kernel@...r.kernel.org, Russell King <linux@...linux.org.uk>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jslaby@...e.com>, linux-serial@...r.kernel.org
Cc:     Mark Langsdorf <mlangsdo@...hat.com>,
        Mark Salter <msalter@...hat.com>, Jon Masters <jcm@...hat.com>,
        Neil Leeder <nleeder@...eaurora.org>
Subject: Re: [PATCH 2/2] tty: pl011: Work around QDF2400 E44 for earlycon

Hi Cov,

The same PL011 driver will be used in virtutal machine, make sure your 
changes have no side effects in VM.



On 02/07/2017 10:07 PM, Timur Tabi wrote:
> Christopher Covington wrote:
>> The previous change worked around QDF2432v1 and QDF2400v1 SoC erratum 44
>> for the full-fledged console, when UART AMBA Port (UAP) data is 
>> available.
>> Additionally provide a workaround the earlycon case, again checking 
>> TXFE ==
>> 0 instead of BUSY == 1. As earlycon is operating before UAP data is
>> available, the implementation is different than in the preceding patch.
>>
>> Signed-off-by: Christopher Covington <cov@...eaurora.org>
>> ---
>>   drivers/tty/serial/amba-pl011.c | 28 +++++++++++++++++++++++++++-
>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/tty/serial/amba-pl011.c 
>> b/drivers/tty/serial/amba-pl011.c
>> index 41e51901d6ef..f25e7c994f8e 100644
>> --- a/drivers/tty/serial/amba-pl011.c
>> +++ b/drivers/tty/serial/amba-pl011.c
>> @@ -2411,6 +2411,29 @@ static bool qdf2400_e44(void) {
>>           cpu_var_model == MIDR_QCOM_FALKOR_V1);
>>   }
>>   +#ifdef CONFIG_QCOM_QDF2400_ERRATUM_44
>> +static void qdf2400_e44_putc(struct uart_port *port, int c)
>> +{
>> +    while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
>> +        cpu_relax();
>> +    if (port->iotype == UPIO_MEM32)
>> +        writel(c, port->membase + UART01x_DR);
>> +    else
>> +        writeb(c, port->membase + UART01x_DR);
> I believe 32-bit writes are safe on QDF2400v1, so I think you 
> technically don't need the UPIO_MEM32 check.  Just always call writel.
>> +    while (!(readl(port->membase + UART01x_FR) & UART011_FR_TXFE))
>> +        cpu_relax();
>> +}
>> +
>> +static void qdf2400_e44_early_write(struct console *con, const char 
>> *s, unsigned n)
>> +{
>> +    struct earlycon_device *dev = con->data;
>> +
>> +    uart_console_write(&dev->port, s, n, qdf2400_e44_putc);
>> +}
>> +#else
>> +#define qdf2400_e44_early_write pl011_early_write
>> +#endif
> Same with patch 1/2.  If you change qdf2400_e44(), you don't need the 
> #else block.
>> +
>>   static void pl011_putc(struct uart_port *port, int c)
>>   {
>>       while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
>> @@ -2436,7 +2459,10 @@ static int __init 
>> pl011_early_console_setup(struct earlycon_device *device,
>>       if (!device->port.membase)
>>           return -ENODEV;
>>   -    device->con->write = pl011_early_write;
>> +    if (qdf2400_e44())
>> +        device->con->write = qdf2400_e44_early_write;
>> +    else
>> +        device->con->write = pl011_early_write;
>>       return 0;
>>   }
>>   OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
>
>

-- 
Shanker Donthineni
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

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