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Message-ID: <alpine.DEB.2.20.1702101852000.4036@nanos>
Date: Fri, 10 Feb 2017 19:01:52 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Stephen Hemminger <sthemmin@...rosoft.com>
cc: Vitaly Kuznetsov <vkuznets@...hat.com>,
"x86@...nel.org" <x86@...nel.org>,
Andy Lutomirski <luto@...capital.net>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
KY Srinivasan <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Dexuan Cui <decui@...rosoft.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devel@...uxdriverproject.org" <devel@...uxdriverproject.org>,
"virtualization@...ts.linux-foundation.org"
<virtualization@...ts.linux-foundation.org>
Subject: RE: [PATCH 2/2] x86/vdso: Add VCLOCK_HVCLOCK vDSO clock read
method
On Fri, 10 Feb 2017, Stephen Hemminger wrote:
> Since sequence count algorithm is done by hypervisor, better to not reuse seqcount.
> Still concerned that the code is racy.
That's a different question and can only be answered by the hypervisor
folks. Dunno, whether they have barrier requirements. The seqcount stuff
relies on:
do {
seq = READ_ONCE(s->sequence);
smp_rmb();
sample_data();
smp_rmb();
} while (s->sequence != seq);
which pairs with the writer side:
s->sequence++;
smp_wmb();
update_data();
smp_wmb();
s->sequence++;
That's important if the stuff happens cross CPU. If the update happens on
the same CPU then this is a different story and as there are VMexits
involved they might provide the required ordering already. But I can't tell
as I have no idea how that host side thing is done.
Thanks,
tglx
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