linux-kernel - [PATCH 3/6] x86/platform/uv/BAU: Add wait_completion to bau

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Message-Id: <1487123931-56809-4-git-send-email-abanman@hpe.com>
Date:   Tue, 14 Feb 2017 19:58:48 -0600
From:   Andrew Banman <abanman@....com>
To:     mingo@...hat.com
Cc:     akpm@...ux-foundation.org, tglx@...utronix.de, hpa@...or.com,
        mike.travis@....com, rja@....com, sivanich@....com, x86@...nel.org,
        linux-kernel@...r.kernel.org, abanman@....com
Subject: [PATCH 3/6] x86/platform/uv/BAU: Add wait_completion to bau_operations

Remove the present wait_completion routine and add a function pointer by
the same name to the bau_operations struct. Rather than switching on the
UV hub version during message processing, set the architecture-specific
uv*_wait_completion during initialization.

Signed-off-by: Andrew Banman <abanman@....com>
Acked-by: Mike Travis <mike.travis@....com>
---
 arch/x86/include/asm/uv/uv_bau.h |  2 ++
 arch/x86/platform/uv/tlb_uv.c    | 41 ++++++++++++++++++++++------------------
 2 files changed, 25 insertions(+), 18 deletions(-)

Index: community/arch/x86/include/asm/uv/uv_bau.h
===================================================================
--- community.orig/arch/x86/include/asm/uv/uv_bau.h
+++ community/arch/x86/include/asm/uv/uv_bau.h
@@ -642,6 +642,8 @@ struct bau_operations {
 	void		(*write_g_sw_ack)(int pnode, unsigned long mmr);
 	void		(*write_payload_first)(int pnode, unsigned long mmr);
 	void		(*write_payload_last)(int pnode, unsigned long mmr);
+	int		(*wait_completion)(struct bau_desc*,
+				struct bau_control*, long try);
 };
 
 static inline void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
Index: community/arch/x86/platform/uv/tlb_uv.c
===================================================================
--- community.orig/arch/x86/platform/uv/tlb_uv.c
+++ community/arch/x86/platform/uv/tlb_uv.c
@@ -23,9 +23,25 @@
 #include <asm/irq_vectors.h>
 #include <asm/timer.h>
 
+static int uv1_wait_completion(struct bau_desc *bau_desc,
+				struct bau_control *bcp, long try);
+static int uv2_3_wait_completion(struct bau_desc *bau_desc,
+				struct bau_control *bcp, long try);
+
 static struct bau_operations ops;
 
-static struct bau_operations uv123_bau_ops = {
+static struct bau_operations uv1_bau_ops = {
+	.bau_gpa_to_offset       = uv_gpa_to_offset,
+	.read_l_sw_ack           = read_mmr_sw_ack,
+	.read_g_sw_ack           = read_gmmr_sw_ack,
+	.write_l_sw_ack          = write_mmr_sw_ack,
+	.write_g_sw_ack          = write_gmmr_sw_ack,
+	.write_payload_first     = write_mmr_payload_first,
+	.write_payload_last      = write_mmr_payload_last,
+	.wait_completion         = uv1_wait_completion,
+};
+
+static struct bau_operations uv23_bau_ops = {
 	.bau_gpa_to_offset       = uv_gpa_to_offset,
 	.read_l_sw_ack           = read_mmr_sw_ack,
 	.read_g_sw_ack           = read_gmmr_sw_ack,
@@ -33,6 +49,7 @@ static struct bau_operations uv123_bau_o
 	.write_g_sw_ack          = write_gmmr_sw_ack,
 	.write_payload_first     = write_mmr_payload_first,
 	.write_payload_last      = write_mmr_payload_last,
+	.wait_completion         = uv2_3_wait_completion,
 };
 
 static struct bau_operations uv4_bau_ops = {
@@ -43,6 +60,7 @@ static struct bau_operations uv4_bau_ops
 	.write_g_sw_ack          = write_gmmr_proc_sw_ack,
 	.write_payload_first     = write_mmr_proc_payload_first,
 	.write_payload_last      = write_mmr_proc_payload_last,
+	.wait_completion         = uv2_3_wait_completion,
 };
 
 
@@ -727,19 +745,6 @@ static int uv2_3_wait_completion(struct
 }
 
 /*
- * There are 2 status registers; each and array[32] of 2 bits. Set up for
- * which register to read and position in that register based on cpu in
- * current hub.
- */
-static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
-{
-	if (bcp->uvhub_version == 1)
-		return uv1_wait_completion(bau_desc, bcp, try);
-	else
-		return uv2_3_wait_completion(bau_desc, bcp, try);
-}
-
-/*
  * Our retries are blocked by all destination sw ack resources being
  * in use, and a timeout is pending. In that case hardware immediately
  * returns the ERROR that looks like a destination timeout.
@@ -967,7 +972,7 @@ int uv_flush_send_and_wait(struct cpumas
 		write_mmr_activation(index);
 
 		try++;
-		completion_stat = wait_completion(bau_desc, bcp, try);
+		completion_stat = ops.wait_completion(bau_desc, bcp, try);
 
 		handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
 
@@ -2176,11 +2181,11 @@ static int __init uv_bau_init(void)
 	if (is_uv4_hub())
 		ops = uv4_bau_ops;
 	else if (is_uv3_hub())
-		ops = uv123_bau_ops;
+		ops = uv23_bau_ops;
 	else if (is_uv2_hub())
-		ops = uv123_bau_ops;
+		ops = uv23_bau_ops;
 	else if (is_uv1_hub())
-		ops = uv123_bau_ops;
+		ops = uv1_bau_ops;
 
 	for_each_possible_cpu(cur_cpu) {
 		mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);