lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6421d298-0497-1a2c-7aa2-c53e4bc4a466@codeaurora.org>
Date:   Wed, 15 Feb 2017 10:51:43 -0700
From:   "Baicar, Tyler" <tbaicar@...eaurora.org>
To:     Steven Rostedt <rostedt@...dmis.org>
Cc:     christoffer.dall@...aro.org, marc.zyngier@....com,
        pbonzini@...hat.com, rkrcmar@...hat.com, linux@...linux.org.uk,
        catalin.marinas@....com, will.deacon@....com, rjw@...ysocki.net,
        lenb@...nel.org, matt@...eblueprint.co.uk, robert.moore@...el.com,
        lv.zheng@...el.com, nkaje@...eaurora.org, zjzhang@...eaurora.org,
        mark.rutland@....com, james.morse@....com,
        akpm@...ux-foundation.org, eun.taik.lee@...sung.com,
        sandeepa.s.prabhu@...il.com, labbott@...hat.com,
        shijie.huang@....com, rruigrok@...eaurora.org,
        paul.gortmaker@...driver.com, tn@...ihalf.com, fu.wei@...aro.org,
        bristot@...hat.com, linux-arm-kernel@...ts.infradead.org,
        kvmarm@...ts.cs.columbia.edu, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
        linux-efi@...r.kernel.org, devel@...ica.org,
        Suzuki.Poulose@....com, punit.agrawal@....com, astone@...hat.com,
        harba@...eaurora.org, hanjun.guo@...aro.org, john.garry@...wei.com,
        shiju.jose@...wei.com
Subject: Re: [PATCH V9 09/10] trace, ras: add ARM processor error trace event

On 2/15/2017 10:47 AM, Steven Rostedt wrote:
> On Wed, 15 Feb 2017 10:44:51 -0700
> Tyler Baicar <tbaicar@...eaurora.org> wrote:
>
>> Currently there are trace events for the various RAS
>> errors with the exception of ARM processor type errors.
>> Add a new trace event for such errors so that the user
>> will know when they occur. These trace events are
>> consistent with the ARM processor error section type
>> defined in UEFI 2.6 spec section N.2.4.4.
>>
>> Signed-off-by: Tyler Baicar <tbaicar@...eaurora.org>
>> Acked-by: Steven Rostedt <rostedt@...dmis.org>
>> ---
>>   drivers/acpi/apei/ghes.c    |  8 +++++++-
>>   drivers/firmware/efi/cper.c |  1 +
>>   drivers/ras/ras.c           |  1 +
>>   include/ras/ras_event.h     | 34 ++++++++++++++++++++++++++++++++++
>>   4 files changed, 43 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
>> index be365e2..560a172 100644
>> --- a/drivers/acpi/apei/ghes.c
>> +++ b/drivers/acpi/apei/ghes.c
>> @@ -514,7 +514,13 @@ static void ghes_do_proc(struct ghes *ghes,
>>   		}
>>   #endif
>>   #ifdef CONFIG_RAS
>> -		else if(trace_unknown_sec_event_enabled()) {
>> +		else if (!uuid_le_cmp(sec_type, CPER_SEC_PROC_ARM) &&
>> +			 trace_arm_event_enabled()) {
>> +			struct cper_sec_proc_arm *arm_err;
>> +
>> +			arm_err = acpi_hest_generic_data_payload(gdata);
>> +			trace_arm_event(arm_err);
>> +		} else if(trace_unknown_sec_event_enabled()) {
> I think you want a space between "if" and "("
>
> -- Steve
Oops :) I'll add that in.
>>   			void *unknown_err = acpi_hest_generic_data_payload(gdata);
>>   			trace_unknown_sec_event(&sec_type,
>>   					fru_id, fru_text, sec_sev,

-- 
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ