linux-kernel - Re: [PATCH 2/2] clk: qoriq: Separate root input clock for core PLLs on ls1012a

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1487183790.5636.13.camel@buserror.net>
Date:   Wed, 15 Feb 2017 12:36:30 -0600
From:   Scott Wood <oss@...error.net>
To:     yuantian.tang@....com, mturquette@...libre.com
Cc:     sboyd@...eaurora.org, robh+dt@...nel.org, mark.rutland@....com,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/2] clk: qoriq: Separate root input clock for core PLLs
 on ls1012a

On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang@....com wrote:
> From: Tang Yuantian <Yuantian.Tang@....com>
> 
> ls1012a has separate input root clocks for core PLLs versus the
> platform PLL, with the latter described as sysclk in the hw docs.
> If a second input clock, named "coreclk", is present, this clock will be
> used for the core PLLs.
> 
> Signed-off-by: Scott Wood <oss@...error.net>
> Signed-off-by: Tang Yuantian <yuantian.tang@....com>
> ---
>  drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++-----

Why did you reset the author on these patches?  Have you changed anything?
 Why aren't they marked either v2 or resend?

-Scott