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Message-Id: <20170216124859.14346-10-clabbe.montjoie@gmail.com>
Date: Thu, 16 Feb 2017 13:48:47 +0100
From: Corentin Labbe <clabbe.montjoie@...il.com>
To: peppe.cavallaro@...com, robh+dt@...nel.org, mark.rutland@....com,
maxime.ripard@...e-electrons.com, wens@...e.org,
linux@...linux.org.uk, catalin.marinas@....com,
will.deacon@....com, alexandre.torgue@...com
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com,
LABBE Corentin <clabbe.montjoie@...il.com>
Subject: [PATCH 09/21] ARM: dts: sun8i: Enable dwmac-sun8i on the Banana Pi M2+
From: LABBE Corentin <clabbe.montjoie@...il.com>
The dwmac-sun8i hardware is present on the Banana Pi M2+
It uses an external PHY rtl8211e via RGMII.
This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 38 +++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index c0c49dd..a4f7b99 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -91,6 +91,18 @@
pinctrl-0 = <&wifi_en_bpi_m2p>;
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_orangepi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
};
&ehci1 {
@@ -187,3 +199,29 @@
/* USB VBUS is on as long as VCC-IO is on */
status = "okay";
};
+
+&pio {
+ gmac_power_pin_orangepi: gmac_power_pin@0 {
+ allwinner,pins = "PD6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ reg = <0>;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+
+ allwinner,leds-active-low;
+ status = "okay";
+};
--
2.10.2
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