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Message-ID: <a1a6a6d7-3aac-3138-1e75-6160f0427a6b@amd.com>
Date: Thu, 16 Feb 2017 13:42:13 -0600
From: Tom Lendacky <thomas.lendacky@....com>
To: Borislav Petkov <bp@...en8.de>
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Subject: Re: [RFC PATCH v4 03/28] x86: Add the Secure Memory Encryption CPU
feature
On 02/16/2017 12:13 PM, Borislav Petkov wrote:
> On Thu, Feb 16, 2017 at 09:42:36AM -0600, Tom Lendacky wrote:
>> Update the CPU features to include identifying and reporting on the
>> Secure Memory Encryption (SME) feature. SME is identified by CPUID
>> 0x8000001f, but requires BIOS support to enable it (set bit 23 of
>> SYS_CFG MSR). Only show the SME feature as available if reported by
>> CPUID and enabled by BIOS.
>>
>> Signed-off-by: Tom Lendacky <thomas.lendacky@....com>
>> ---
>> arch/x86/include/asm/cpufeature.h | 7 +++++--
>> arch/x86/include/asm/cpufeatures.h | 5 ++++-
>> arch/x86/include/asm/disabled-features.h | 3 ++-
>> arch/x86/include/asm/msr-index.h | 2 ++
>> arch/x86/include/asm/required-features.h | 3 ++-
>> arch/x86/kernel/cpu/common.c | 19 +++++++++++++++++++
>> 6 files changed, 34 insertions(+), 5 deletions(-)
>
> What happened here?
>
> You had it already:
>
> https://lkml.kernel.org/r/20161110003459.3280.25796.stgit@tlendack-t1.amdoffice.net
>
> The bit in get_cpu_cap() with checking the MSR you can add at the end of
> init_amd() for example.
I realize it's a bit more code and expands the changes but I thought it
would be a bit clearer as to what was going on this way. And then the
follow on patch for the physical address reduction goes in nicely, too.
If you prefer I stay with the scattered feature approach and then clear
the bit based on the MSR at the end of init_amd() I can do that. I'm
not attached to either method.
Thanks,
Tom
>
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