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Message-ID: <9E032F7F-15FB-4912-B58A-AFA68D06ADE3@gmx.de>
Date: Fri, 17 Feb 2017 08:15:53 +0100
From: Peter Huewe <peterhuewe@....de>
To: Christophe Ricard <christophe.ricard@...il.com>,
Peter Huewe <peter.huewe@...ineon.com>,
Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
CC: Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
tpmdd-devel@...ts.sourceforge.net, linux-kernel@...r.kernel.org,
Christophe Ricard <christophe-h.ricard@...com>,
stable@...r.kernel.org,
Alexander Steffen <Alexander.Steffen@...ineon.com>
Subject: Re: [PATCH 3/5] tpm_tis_spi: Check correct byte for wait state indicator
Am 17. Februar 2017 06:09:30 MEZ schrieb Christophe Ricard <christophe.ricard@...il.com>:
>That's is correct, this is a mistake on my side and never saw it :-(.
>
>I guess it was possibly leading to "waste" at least 1 wait state on
>some
>TPMs.
Unfortunately the 1 for indicating end of waitstates does only appear once so it actually rendered the driver non-functional - atleast with our tpms.
>
>Wouldn't it be better to merge that with #1 and update the comment
>consequently?
Yes, that's what I wanted to express in the cover letter, logically it makes sense to squash #1 and #3 - but reviewing it merged with #1 is quite hard since it "obfuscates" the problem - since too much stuff moves around.
That's why I decided to split it - for easier review.
Peter
>
>
>On 16/02/2017 08:08, Peter Huewe wrote:
>> Wait states are signaled in the last byte received from the TPM in
>> response to the header, not the first byte. Check rx_buf[3] instead
>of
>> rx_buf[0].
>>
>> Cc: <stable@...r.kernel.org>
>> Fixes: 0edbfea537d1 ("tpm/tpm_tis_spi: Add support for spi phy")
>> Signed-off-by: Alexander Steffen <Alexander.Steffen@...ineon.com>
>> Signed-off-by: Peter Huewe <peter.huewe@...ineon.com>
>> ---
>> drivers/char/tpm/tpm_tis_spi.c | 40
>+++++++++++++++++++++-------------------
>> 1 file changed, 21 insertions(+), 19 deletions(-)
>>
>> diff --git a/drivers/char/tpm/tpm_tis_spi.c
>b/drivers/char/tpm/tpm_tis_spi.c
>> index d782b9974c14..16938e2253d2 100644
>> --- a/drivers/char/tpm/tpm_tis_spi.c
>> +++ b/drivers/char/tpm/tpm_tis_spi.c
>> @@ -60,7 +60,7 @@ static int tpm_tis_spi_transfer(struct tpm_tis_data
>*data, u32 addr, u8 len,
>> u8 *buffer, u8 direction)
>> {
>> struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
>> - int ret, i;
>> + int ret;
>> struct spi_message m;
>> struct spi_transfer spi_xfer = {
>> .tx_buf = phy->tx_buf,
>> @@ -85,25 +85,27 @@ static int tpm_tis_spi_transfer(struct
>tpm_tis_data *data, u32 addr, u8 len,
>> if (ret < 0)
>> goto exit;
>>
>> - phy->tx_buf[0] = 0;
>> -
>> - /* According to TCG PTP specification, if there is no TPM present
>at
>> - * all, then the design has a weak pull-up on MISO. If a TPM is not
>> - * present, a pull-up on MISO means that the SB controller sees a
>1,
>> - * and will latch in 0xFF on the read.
>> - */
>> - for (i = 0; (phy->rx_buf[0] & 0x01) == 0 && i < TPM_RETRY; i++) {
>> - spi_xfer.len = 1;
>> - spi_message_init(&m);
>> - spi_message_add_tail(&spi_xfer, &m);
>> - ret = spi_sync_locked(phy->spi_device, &m);
>> - if (ret < 0)
>> + if ((phy->rx_buf[3] & 0x01) == 0) {
>> + // handle SPI wait states
>> + int i;
>> +
>> + phy->tx_buf[0] = 0;
>> +
>> + for (i = 0; i < TPM_RETRY; i++) {
>> + spi_xfer.len = 1;
>> + spi_message_init(&m);
>> + spi_message_add_tail(&spi_xfer, &m);
>> + ret = spi_sync_locked(phy->spi_device, &m);
>> + if (ret < 0)
>> + goto exit;
>> + if (phy->rx_buf[0] & 0x01)
>> + break;
>> + }
>> +
>> + if (i == TPM_RETRY) {
>> + ret = -ETIMEDOUT;
>> goto exit;
>> - }
>> -
>> - if (i == TPM_RETRY) {
>> - ret = -ETIMEDOUT;
>> - goto exit;
>> + }
>> }
>>
>> spi_xfer.cs_change = 0;
--
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