lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1e937e66-0a2a-c506-ab59-bec06c639026@redhat.com>
Date:   Mon, 20 Feb 2017 18:52:28 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>
Cc:     kvm list <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Borislav Petkov <bpetkov@...e.de>,
        Thomas Garnier <thgarnie@...gle.com>,
        Jim Mattson <jmattson@...gle.com>
Subject: Re: [PATCH 0/6] KVM TSS cleanups and speedups



On 20/02/2017 17:56, Andy Lutomirski wrote:
> The first four patches here are intended to be straightforward
> cleanups and to make a better base for Thomas' GDT series.  They may
> be a slight speedup, too, because they remove an STR instruction
> from the VMX entry path.
> 
> The last two patches are a reasonably large speedup but need careful
> review.

I spotted (I think) a bug in patch 6, but apart from that it looks nice.

Paolo

> FWIW, I can see lots of additional easy-ish speedups here.  For example:
> 
>  - The GDT reload on VM exit isn't really needed at all.  Instead let's
>    just change the kernel limit to 0xFFFF.  Doing that naively would
>    waste memory, but doing it carefully on top of Thomas' series would
>    be straightforward and almost free.
> 
>  - RDMSR from MSR_GS_BASE is totally pointless.
> 
>  - Once I or someone finishes the FSGSBASE series, we get a big speedup
>    there.
> 
>  - The LDT reload code should be split up and optimized better, I think.
> 
> Andy Lutomirski (6):
>   x86/asm: Define the kernel TSS limit in a macro
>   x86/kvm/vmx: Don't fetch the TSS base from the GDT
>   x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels
>   x86/kvm/vmx: Simplify segment_base()
>   x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss
>   x86/kvm/vmx: Defer TR reload after VM exit
> 
>  arch/x86/include/asm/desc.h      | 58 ++++++++++++++++++++++++++++++------
>  arch/x86/include/asm/processor.h | 12 +++++++-
>  arch/x86/kernel/ioport.c         |  5 ++++
>  arch/x86/kernel/process.c        | 10 +++++++
>  arch/x86/kvm/vmx.c               | 63 +++++++++++++++++-----------------------
>  5 files changed, 102 insertions(+), 46 deletions(-)
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ