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Message-ID: <f19fea79c2616455f5f08070923428cc@crapouillou.net>
Date: Tue, 21 Feb 2017 12:20:10 +0100
From: Paul Cercueil <paul@...pouillou.net>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Rob Herring <robh@...nel.org>, Mark Rutland <mark.rutland@....com>,
Ralf Baechle <ralf@...ux-mips.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
Thierry Reding <thierry.reding@...il.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Maarten ter Huurne <maarten@...ewalker.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Paul Burton <paul.burton@...tec.com>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Linux MIPS <linux-mips@...ux-mips.org>,
linux-mmc@...r.kernel.org, linux-mtd@...ts.infradead.org,
linux-pwm@...r.kernel.org, linux-fbdev@...r.kernel.org,
James Hogan <james.hogan@...tec.com>
Subject: Re: [PATCH v3 01/14] Documentation: dt/bindings: Document
pinctrl-ingenic
Le 2017-02-20 14:56, Linus Walleij a écrit :
> On Thu, Feb 9, 2017 at 6:28 PM, Paul Cercueil <paul@...pouillou.net>
> wrote:
>
>> I was thinking that instead of having one pinctrl-ingenic instance
>> covering
>> 0x600 of register space, and 6 instances of gpio-ingenic having 0x100
>> each,
>> I could just have 6 instances of pinctrl-ingenic, each one with an
>> instance
>> of gpio-ingenic declared as a sub-node, each handling just 0x100 of
>> memory
>> space.
>
> My head is spinning, but I think I get it. What is wrong with the
> solution
> I proposed with one pin control instance covering the whole 0x600 and
> with 6
> subnodes of GPIO?
>
> The GPIO nodes do not even have to have an address range associated
> with
> them you know, that can be distributed out with regmap code accessing
> the parent regmap.
OK, but then each GPIO chip 'X' still need to know its offset in the
register
area, which is (pinctrl_base + X * 0x100).
What's the best way to pass that info to the driver? (I assume it's not
with
a custom DT binding...).
Regards,
-Paul
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