linux-kernel - Re: [RESEND PATCH 1/3] mtd: nand: Pass the CS line to ->setup_data

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Message-ID: <45a843fb-c43e-711f-ce3a-4c0d44c48144@sigmadesigns.com>
Date:   Tue, 21 Feb 2017 13:02:48 +0100
From:   Marc Gonzalez <marc_gonzalez@...madesigns.com>
To:     Boris Brezillon <boris.brezillon@...e-electrons.com>
CC:     Richard Weinberger <richard@....at>,
        <linux-mtd@...ts.infradead.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Sergio Prado <sergio.prado@...abworks.com>,
        Wenyou Yang <wenyou.yang@...el.com>,
        Josh Wu <rainyfeeling@...look.com>,
        David Woodhouse <dwmw2@...radead.org>,
        "Brian Norris" <computersforpeace@...il.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Cyrille Pitchen <cyrille.pitchen@...el.com>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [RESEND PATCH 1/3] mtd: nand: Pass the CS line to
 ->setup_data_interface()

On 21/02/2017 12:06, Boris Brezillon wrote:

> Marc Gonzalez wrote:
> 
>> On 20/02/2017 22:12, Boris Brezillon wrote:
>>
>>> Some NAND controllers can assign different NAND timings to different
>>> CS lines. Pass the CS line information to ->setup_data_interface() so
>>> that the NAND controller driver knows which CS line is concerned by
>>> the setup_data_interface() request.  
>>
>> I'm confused, because I thought I was already doing that.
>> On my platform, I have different timings for each chip.
>> (thus, for each CS, right?)
>>
>> In chip->select_chip, I program the appropriate timings
>> which the controller will be using.
>>
>> What am I missing?
> 
> Maybe you don't have multi-dies chips, which is the case I'm fixing
> here. If you have 2 separate chips, the existing hook should work just
> fine.

Right. You asked me to add an explicit:

	res = of_property_count_u32_elems(np, "reg");
	if (res < 0)
		return res;

	if (res != 1)
		return -ENOTSUPP; /* Multi-CS chips are not supported */

I was under the impression that multi-die chips are seen as a single
larger "composite" chip. And I had assumed that different dies would
not only require identical timings, but would also be identical in
all other aspects. This it incorrect?

Regards.