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Date:   Tue, 21 Feb 2017 09:36:04 -0800
From:   David Daney <ddaney@...iumnetworks.com>
To:     Christoph Hellwig <hch@....de>,
        George Cherian <gcherian@...iumnetworks.com>
Cc:     George Cherian <george.cherian@...ium.com>,
        David Daney <david.daney@...ium.com>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: crypto/cavium MSI-X fixups

On 02/19/2017 09:32 AM, Christoph Hellwig wrote:
> Herbert,
>
> any comment?  I'd really like to avoid introducing new pci_enable_msix
> users in this merge window..

Hi Cristoph,

With respect to pci_enable_msix(), what do you recommend as a 
replacement?  For the crypto/cavium driver, you recommend 
pci_alloc_irq_vectors(), which works well if the required MSI-X indexes 
are contiguous starting at zero.   What would be used for a device that 
has 184 MSI-X, but only a sparse subset (fewer than half) of these are 
required for the driver operation.  It would waste system resources to 
use an API that forces us to allocate 184 when only 80 are required.

Currently pci_enable_msix() allows an arbitrary set of MSI-X to be 
requested, which exactly fits the requirements of our (non 
crypto/cavium) hardware.

Thanks in advance for any insight you can provide,
David Daney


>
> On Wed, Feb 15, 2017 at 02:47:09PM +0530, George Cherian wrote:
>> Hi Christoph,
>>
>>
>> On 02/15/2017 12:48 PM, Christoph Hellwig wrote:
>>> Hi George,
>>>
>>> your commit "crypto: cavium - Add Support for Octeon-tx CPT Engine"
>>> add a new caller to pci_enable_msix.  This API has long been deprecated
>>> so this series switches it to use pci_alloc_irq_vectors instead.
>>>
>>> Can you please test it and make sure it goes in before the end of the
>>> merge window so that no more users of the old API hit mainline?
>>
>> Yes the changes works well.
>> Acked-by: George Cherian <george.cherian@...ium.com>
>>
>> for the series.
>>>
> ---end quoted text---
>

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