linux-kernel - Re: [PATCH v3 7/8] arm64: dts: mt8173: move clock from phy node into port nodes

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Message-ID: <1487760489.7255.5.camel@mhfsdcap03>
Date:   Wed, 22 Feb 2017 18:48:09 +0800
From:   Chunfeng Yun <chunfeng.yun@...iatek.com>
To:     Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
CC:     Kishon Vijay Abraham I <kishon@...com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Felipe Balbi <felipe.balbi@...ux.intel.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        "Ian Campbell" <ijc+devicetree@...lion.org.uk>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-usb@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH v3 7/8] arm64: dts: mt8173: move clock from phy node
 into port nodes

Hi,
On Wed, 2017-02-22 at 12:36 +0300, Sergei Shtylyov wrote:
> On 2/22/2017 11:55 AM, Chunfeng Yun wrote:
> 
> > there is a reference clock for each port, HighSpeed port is 48M,
> > and SuperSpeed port is 26M which usually comes from 26M oscillator
> > directly, but some SoCs is not. it is flexible to move it into port
> 
>     ... but on some SoCs does not?
I mean the reference clock of SuperSpeed port comes from PLL and need be
controlled by driver on some SoCs. When it comes from oscillator
directly, it is optional and is ok whether the driver controll it or not
> 
> > node.
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
> [...]
> 
> MBR, Sergei
>