lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1487838006.4463.34.camel@gmx.de>
Date:   Thu, 23 Feb 2017 09:20:06 +0100
From:   Mike Galbraith <efault@....de>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Olof Johansson <olof@...om.net>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Ingo Molnar <mingo@...nel.org>,
        "H. Peter Anvin" <hpa@...or.com>,
        Peter Zijlstra <peterz@...radead.org>
Subject: Re: [GIT pull] x86/timers for 4.10

On Thu, 2017-02-09 at 16:07 +0100, Thomas Gleixner wrote:
> On Wed, 8 Feb 2017, Mike Galbraith wrote:
> > On Wed, 2017-02-08 at 12:44 +0100, Thomas Gleixner wrote:
> > > On Mon, 6 Feb 2017, Olof Johansson wrote:
> > > > [    0.177102] [Firmware Bug]: TSC ADJUST differs: Reference
> > > > CPU0:
> > > > -6495898515190607 CPU1: -6495898517158354
> > > 
> > > Yay, another "clever" BIOS ....
> > 
> > Oh yeah, that reminds me...
> > 
> > I met one such box, and the adjustment code did salvage it, but I
> > had
> > to cheat a little for it to do so reliably, as it would sometimes
> > still
> > see a delta of 1 or 2 whole cycles, and hand me a useless wreck
> > instead
> > quick like bunny big box.
> 
> Can you share your cheatery ?

I can do better than that... sorta ;-)

x86/tsc: Fix unreliable tsc adjust

On a 4 socket BIOS challenged box (4x18), the magic number '3' does
not work reliably, resulting in TSC being disabled more often than not.

Replace defective magic number '3' with functional magic number '5',
derived via scientific method number sockets in afflicted box, plus
one for good luck, and reboot box a lot to validate (poke 'n' hope).

Signed-off-by: Mike Galbraith <efault@....de>
---
 arch/x86/kernel/tsc_sync.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -294,7 +294,7 @@ void check_tsc_sync_source(int cpu)
 	if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST))
 		atomic_set(&test_runs, 1);
 	else
-		atomic_set(&test_runs, 3);
+		atomic_set(&test_runs, 5);
 retry:
 	/*
 	 * Wait for the target to start or to skip the test:

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ