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Message-ID: <20b7d3b7-85be-b701-19ca-1e8024260fc2@gmail.com>
Date: Wed, 22 Feb 2017 16:06:36 -0800
From: Steve Longerbeam <slongerbeam@...il.com>
To: Russell King - ARM Linux <linux@...linux.org.uk>,
Philipp Zabel <p.zabel@...gutronix.de>
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Steve Longerbeam <steve_longerbeam@...tor.com>
Subject: Re: [PATCH v4 23/36] media: imx: Add MIPI CSI-2 Receiver subdev
driver
On 02/17/2017 03:06 AM, Russell King - ARM Linux wrote:
> On Fri, Feb 17, 2017 at 11:47:59AM +0100, Philipp Zabel wrote:
>> On Wed, 2017-02-15 at 18:19 -0800, Steve Longerbeam wrote:
>>> +static void csi2_dphy_init(struct csi2_dev *csi2)
>>> +{
>>> + /*
>>> + * FIXME: 0x14 is derived from a fixed D-PHY reference
>>> + * clock from the HSI_TX PLL, and a fixed target lane max
>>> + * bandwidth of 300 Mbps. This value should be derived
>>
>> If the table in https://community.nxp.com/docs/DOC-94312 is correct,
>> this should be 850 Mbps. Where does this 300 Mbps value come from?
>
> I thought you had some code to compute the correct value, although
> I guess we've lost the ability to know how fast the sensor is going
> to drive the link.
>
> Note that the IMX219 currently drives the data lanes at 912Mbps almost
> exclusively, as I've yet to finish working out how to derive the PLL
> parameters. (I have something that works, but it currently takes on
> the order of 100k iterations to derive the parameters. gcd() doesn't
> help you in this instance.)
Hi Russell,
As I mentioned, I've added code to imx6-mipi-csi2 to determine the
sources link frequency via V4L2_CID_LINK_FREQ. If you were to implement
this control and return 912 Mbps-per-lane, the D-PHY will be programmed
correctly for the IMX219 (at least, that is the theory anyway).
Alternatively, I could up the default in imx6-mipi-csi2 to 950
Mbps. I will have to test that to make sure it still works with
OV5640 and tc358743.
Steve
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