linux-kernel - [PATCH v3 19/25] dt-bindings: arm: cpus: Add S500 enable-method

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20170228063535.32069-20-afaerber@suse.de>
Date:   Tue, 28 Feb 2017 07:35:29 +0100
From:   Andreas Färber <afaerber@...e.de>
To:     arm@...nel.org
Cc:     linux-arm-kernel@...ts.infradead.org, mp-cs@...ions-semi.com,
        96boards@...obotics.com, support@...aker.org,
        linux-kernel@...r.kernel.org,
        Andreas Färber <afaerber@...e.de>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org
Subject: [PATCH v3 19/25] dt-bindings: arm: cpus: Add S500 enable-method

The Actions Semi S500 SoC requires a special secondary CPU boot procedure.

Signed-off-by: Andreas Färber <afaerber@...e.de>
---
 v3: new
 
 Documentation/devicetree/bindings/arm/cpus.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 698ad1f0..e3e1e2f 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -192,6 +192,7 @@ nodes to be present and contain the properties described below.
 			     "spin-table"
 			# On ARM 32-bit systems this property is optional and
 			  can be one of:
+			    "actions,s500-smp"
 			    "allwinner,sun6i-a31"
 			    "allwinner,sun8i-a23"
 			    "arm,realview-smp"
-- 
2.10.2