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Message-ID: <58B7D813.90604@rock-chips.com>
Date:   Thu, 02 Mar 2017 16:30:11 +0800
From:   Kever Yang <kever.yang@...k-chips.com>
To:     David Wu <david.wu@...k-chips.com>, heiko@...ech.de,
        linus.walleij@...aro.org
CC:     huangtao@...k-chips.com, linux-rockchip@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org
Subject: Re: [PATCH v2 1/2] pinctrl: rockchip:Add input schmitt support

Hi David,

On 03/02/2017 03:11 PM, David Wu wrote:
> From: "david.wu" <david.wu@...k-chips.com>

You do not need to add this when you send mail for yourself,
it's need when you send mail for others.

>
> To prevent external signal crosstalk, some pins need to
> enable input schmitt, like i2c pins, 32k-input pin and so on.
>
> Signed-off-by: david.wu <david.wu@...k-chips.com>

Better to use "David Wu" for full name, you can correct this in your 
gitconfig file.

Thanks,
- Kever
> ---
> changes in v2:
>   - check the return value (Heiko)
>
>   drivers/pinctrl/pinctrl-rockchip.c | 73 ++++++++++++++++++++++++++++++++++++++
>   1 file changed, 73 insertions(+)
>
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
> index a20ce9f..9b8d516 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -308,6 +308,9 @@ struct rockchip_pin_ctrl {
>   				    int *reg, u8 *bit);
>   	void	(*iomux_recalc)(u8 bank_num, int pin, int *reg,
>   				u8 *bit, int *mask);
> +	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
> +				    int pin_num, struct regmap **regmap,
> +				    int *reg, u8 *bit);
>   };
>   
>   struct rockchip_pin_config {
> @@ -1355,6 +1358,57 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
>   	return ret;
>   }
>   
> +static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num)
> +{
> +	struct rockchip_pinctrl *info = bank->drvdata;
> +	struct rockchip_pin_ctrl *ctrl = info->ctrl;
> +	struct regmap *regmap;
> +	int reg, ret;
> +	u8 bit;
> +	u32 data;
> +
> +	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
> +	if (ret)
> +		return ret;
> +
> +	ret = regmap_read(regmap, reg, &data);
> +	if (ret)
> +		return ret;
> +
> +	data >>= bit;
> +	return data & 0x1;
> +}
> +
> +static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
> +				int pin_num, int enable)
> +{
> +	struct rockchip_pinctrl *info = bank->drvdata;
> +	struct rockchip_pin_ctrl *ctrl = info->ctrl;
> +	struct regmap *regmap;
> +	int reg, ret;
> +	unsigned long flags;
> +	u8 bit;
> +	u32 data, rmask;
> +
> +	dev_dbg(info->dev, "setting input schmitt of GPIO%d-%d to %d\n",
> +		bank->bank_num, pin_num, enable);
> +
> +	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
> +	if (ret)
> +		return ret;
> +
> +	spin_lock_irqsave(&bank->slock, flags);
> +
> +	/* enable the write to the equivalent lower bits */
> +	data = BIT(bit + 16) | (enable << bit);
> +	rmask = BIT(bit + 16) | BIT(bit);
> +
> +	ret = regmap_update_bits(regmap, reg, rmask, data);
> +	spin_unlock_irqrestore(&bank->slock, flags);
> +
> +	return ret;
> +}
> +
>   /*
>    * Pinmux_ops handling
>    */
> @@ -1574,6 +1628,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
>   			if (rc < 0)
>   				return rc;
>   			break;
> +		case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
> +			if (!info->ctrl->schmitt_calc_reg)
> +				return -ENOTSUPP;
> +
> +			rc = rockchip_set_schmitt(bank,
> +						  pin - bank->pin_base, arg);
> +			if (rc < 0)
> +				return rc;
> +			break;
>   		default:
>   			return -ENOTSUPP;
>   			break;
> @@ -1634,6 +1697,16 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
>   
>   		arg = rc;
>   		break;
> +	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
> +		if (!info->ctrl->schmitt_calc_reg)
> +			return -ENOTSUPP;
> +
> +		rc = rockchip_get_schmitt(bank, pin - bank->pin_base);
> +		if (rc < 0)
> +			return rc;
> +
> +		arg = rc;
> +		break;
>   	default:
>   		return -ENOTSUPP;
>   		break;


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