[<prev] [next>] [day] [month] [year] [list]
Message-Id: <1488451703-88692-1-git-send-email-anurup.m@huawei.com>
Date: Thu, 2 Mar 2017 05:48:23 -0500
From: Anurup M <anurupvasu@...il.com>
To: gregkh@...uxfoundation.org, geert+renesas@...der.be,
davem@...emloft.net, akpm@...ux-foundation.org,
mark.rutland@....com, will.deacon@....com
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
anurup.m@...wei.com, zhangshaokun@...ilicon.com,
tanxiaojun@...wei.com, xuwei5@...ilicon.com,
sanil.kumar@...ilicon.com, john.garry@...wei.com,
gabriele.paoloni@...wei.com, shiju.jose@...wei.com,
huangdaode@...ilicon.com, linuxarm@...wei.com,
dikshit.n@...wei.com, shyju.pv@...wei.com, anurupvasu@...il.com
Subject: [PATCH v5 01/11] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support
Add support for Hisilicon SoC hardware event counters
for HiP05/06/07 chip versions.
Signed-off-by: Anurup M <anurup.m@...wei.com>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d662a83..9bb2ddb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5875,6 +5875,15 @@ S: Maintained
F: drivers/net/ethernet/hisilicon/
F: Documentation/devicetree/bindings/net/hisilicon*.txt
+HISILICON SOC PMU
+M: Anurup M <anurup.m@...wei.com>
+W: http://www.hisilicon.com
+S: Supported
+F: drivers/perf/hisilicon/
+F: Documentation/perf/hisi-pmu.txt
+F: Documentation/devicetree/bindings/arm/hisilicon/pmu.txt
+F: Documentation/devicetree/bindings/arm/hisilicon/djtag.txt
+
HISILICON ROCE DRIVER
M: Lijun Ou <oulijun@...wei.com>
M: Wei Hu(Xavier) <xavier.huwei@...wei.com>
--
2.1.4
Powered by blists - more mailing lists