linux-kernel - [PATCH RT 4/9] x86/mm/cpa: avoid wbinvd() for PREEMPT

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Date:   Tue, 7 Mar 2017 16:32:54 -0600
From:   Julia Cartwright <julia@...com>
To:     <linux-kernel@...r.kernel.org>, <linux-rt-users@...r.kernel.org>
CC:     Thomas Gleixner <tglx@...utronix.de>,
        Carsten Emde <C.Emde@...dl.org>,
        Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
        John Kacur <jkacur@...hat.com>,
        Paul Gortmaker <paul.gortmaker@...driver.com>,
        Steven Rostedt <rostedt@...dmis.org>,
        <stable-rt@...r.kernel.org>,
        John Ogness <john.ogness@...utronix.de>
Subject: [PATCH RT 4/9] x86/mm/cpa: avoid wbinvd() for PREEMPT

4.1.38-rt46-rc1 stable review patch.
If you have any objection to the inclusion of this patch, let me know.

--- 8< --- 8< --- 8< ---
From: John Ogness <john.ogness@...utronix.de>

Although wbinvd() is faster than flushing many individual pages, it
blocks the memory bus for "long" periods of time (>100us), thus
directly causing unusually large latencies on all CPUs, regardless
of any CPU isolation features that may be active.

For 1024 pages, flushing those pages individually can take up to
2200us, but the task remains fully preemptible during that time.

Cc: stable-rt@...r.kernel.org
Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Signed-off-by: John Ogness <john.ogness@...utronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
(cherry picked from commit 9e539d7327b265c639c859ab1fb7d3699ba0cb19)
Signed-off-by: Julia Cartwright <julia@...com>
---
 arch/x86/mm/pageattr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 2dd9b3ad3bb5..4314b9103ff0 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -209,7 +209,15 @@ static void cpa_flush_array(unsigned long *start, int numpages, int cache,
 			    int in_flags, struct page **pages)
 {
 	unsigned int i, level;
+#ifdef CONFIG_PREEMPT
+	/*
+	 * Avoid wbinvd() because it causes latencies on all CPUs,
+	 * regardless of any CPU isolation that may be in effect.
+	 */
+	unsigned long do_wbinvd = 0;
+#else
 	unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
+#endif
 
 	BUG_ON(irqs_disabled());
 
-- 
2.11.1