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Date:   Wed, 08 Mar 2017 20:02:13 +0900
From:   Magnus Damm <magnus.damm@...il.com>
To:     joro@...tes.org
Cc:     laurent.pinchart+renesas@...asonboard.com, geert+renesas@...der.be,
        linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
        iommu@...ts.linux-foundation.org, horms+renesas@...ge.net.au,
        Magnus Damm <magnus.damm@...il.com>, robin.murphy@....com,
        m.szyprowski@...sung.com
Subject: [PATCH v3 05/09] iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master

From: Magnus Damm <damm+renesas@...nsource.se>

The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.

Signed-off-by: Magnus Damm <damm+renesas@...nsource.se>
---

 Changes since V2:
 - Updated the code and commit message to use 40 bits instead of 64 bits

 Changes since V1:
 - Updated the commit message

 drivers/iommu/ipmmu-vmsa.c |    1 +
 1 file changed, 1 insertion(+)

--- 0016/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c	2017-03-08 18:29:56.390607110 +0900
@@ -1103,6 +1103,7 @@ static int ipmmu_probe(struct platform_d
 	spin_lock_init(&mmu->lock);
 	bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
 	mmu->features = match->data;
+	dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
 
 	/* Map I/O memory and request IRQ. */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

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