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Message-ID: <32adcffc-4d63-5953-9e61-3f48773a5e14@synopsys.com>
Date: Wed, 8 Mar 2017 15:33:36 +0000
From: Joao Pinto <Joao.Pinto@...opsys.com>
To: Kishon Vijay Abraham I <kishon@...com>,
Joao Pinto <Joao.Pinto@...opsys.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Jingoo Han <jingoohan1@...il.com>
CC: <linux-pci@...r.kernel.org>, <linux-doc@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-omap@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <nsekhar@...com>
Subject: Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support
Às 3:32 PM de 3/8/2017, Joao Pinto escreveu:
> Às 1:31 PM de 3/8/2017, Kishon Vijay Abraham I escreveu:
>> Hi,
>>
>> On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote:
>>> Às 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu:
>>>> Hi,
>>>>
>>>> On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote:
>>>>>
>>>>> Hi Kishon,
>>>>>
>>>>>>> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to
>>>>>>> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)?
>>>>>>
>>>>>> Yes of course, I will send you the definition soon.
>>>>>
>>>>> As promissed here is the definition for Inbound:
>>>>>
>>>>> +/* register address builder */
>>>>> +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \
>>>>> + ((0x3 << 20) | (region << 9) | \
>>>>> + (0x1 << 8) | (register << 2))
>>>>
>>>> Cool, thanks!
>>>
>>> No problem! If you have doubts, please let me know.
>>
>> Okay, so this looks slightly different than the outbound macro since it takes
>> the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_OFFSET
>> returns the offset which was used like
>> dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val);
>>
>> How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used?
>
> My original way was this one:
>
> +/* Register address builder */
> +#define PCIE_GET_ATU_OUTB_UNR_REG_ADDR(region, register) \
> + ((0x3 << 20) | (region << 9) | \
> + (register << 2))
>
> Bjorn then converted to offset:
>
> #define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region) ((0x3 << 20) | (region << 9))
>
> and applied the <<2 shift to the ATU registers.
>
> So you can use:
>
> #define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \
> ((0x3 << 20) | (region << 9) | \
> (0x1 << 8)
>
This one has the right name :)
#define PCIE_GET_ATU_INB_UNR_REG_OFFSET(region, register) \
((0x3 << 20) | (region << 9) | \
(0x1 << 8)
> Thanks.
>
>>
>> Thanks
>> Kishon
>>
>
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