linux-kernel - Re: [PATCH v2 0/3] x86/process: Optimize __switch_to

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Date:   Wed, 8 Mar 2017 14:07:00 -0800
From:   Kyle Huey <me@...ehuey.com>
To:     LKML <linux-kernel@...r.kernel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Andy Lutomirski <luto@...nel.org>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>
Subject: Re: [PATCH v2 0/3] x86/process: Optimize __switch_to_xtra()

On Tue, Feb 28, 2017 at 10:33 AM, Kyle Huey <me@...ehuey.com> wrote:
> On Tue, Feb 14, 2017 at 12:11 AM, Kyle Huey <me@...ehuey.com> wrote:
>> GCC generates lousy code in __switch_to_xtra.  This patch series is an
>> updated version of tglx's patches from last year
>> (https://lkml.org/lkml/2016/12/15/432) that address review comments.
>>
>> Since v1:
>> Part 1 - x86/process: Optimize TIF checks in __switch_to_xtra()
>> - READ_ONCE annotations added as requested by Andy Lutomirski
>>
>> Part 2 - x86/process: Correct and optimize TIF_BLOCKSTEP switch
>> - DEBUGCTLMSR_BTF is now modified when either the previous or
>>   next or both tasks use it, because the MSR is "highly magical".
>>
>> Part 3 - x86/process: Optimize TIF_NOTSC switch
>> - Unchanged
>>
>> I didn't introduce a cpufeature for blockstep because that would
>> add additional overhead compared to the existing code, where it's
>> generally known at compile time that blockstep is supported. Perhaps
>> we should just BUG_ON(!arch_has_block_step()) here if we really
>> care to check anything.
>>
>> arch/x86/include/asm/msr-index.h |  1 +
>> arch/x86/include/asm/tlbflush.h  | 10 ++++++++++
>> arch/x86/kernel/process.c        | 76 +++++++++++++++++++++++++++++++++++-----------------------------------------
>> 3 files changed, 46 insertions(+), 41 deletions(-)
>>
>
> Has anyone had a change to look at these?

Maybe now that the 4.11 merge window is closed? :)

- Kyle