linux-kernel - Re: [v2, 2/4] mtd: spi-nor: Add Octal SPI support to Cadence QSPI driver.

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Message-ID: <23371579-495a-1336-cce9-3860a2e2a4c1@gmail.com>
Date:   Fri, 10 Mar 2017 15:15:13 +0100
From:   Marek Vasut <marek.vasut@...il.com>
To:     Artur Jedrysek <jartur@...ence.com>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Cyrille Pitchen <cyrille.pitchen@...el.com>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Richard Weinberger <richard@....at>,
        Dinh Nguyen <dinguyen@...nel.org>
Subject: Re: [v2, 2/4] mtd: spi-nor: Add Octal SPI support to Cadence QSPI
 driver.

On 03/10/2017 03:09 PM, Artur Jedrysek wrote:

CCing Dinh.

[...]

>>>>> +	/* Determine, whether or not octal transfer MAY be supported */
>>>>
>>>> But you already know that from DT, no ?
>>>>
>>>
>>> Cadence Octal (formerly Quad) SPI Controller is sold as an IP, and is
>>> configurable. This includes max SPI mode. It is possible to detect, that
>>> Octal SPI controller is configured (during hardware compilation) to support
>>> up to Quad mode, using revision register.
>>
>> So the octal-spi controller always has this config register, but the
>> quad-spi controller may or may not have this register ?
>>
> 
> This register was always present. In Quad-SPI, however, it didn't contain
> information about maximum possible mode, as only quad was possible, and
> meaning of bits checked here was different.

OK

>>>>> +	rev_reg = readl(cqspi->iobase + CQSPI_REG_MODULEID);
>>>>> +	dev_info(dev, "CQSPI Module id %x\n", rev_reg);
>>>>> +
>>>>> +	switch (rev_reg & CQSPI_REG_MODULEID_CONF_ID_MASK) {
>>>>> +	case CQSPI_REG_MODULEID_CONF_ID_OCTAL_PHY:
>>>>> +	case CQSPI_REG_MODULEID_CONF_ID_OCTAL:
>>>>> +		mode = SPI_NOR_OCTAL;
>>>>> +		break;
>>>>> +	case CQSPI_REG_MODULEID_CONF_ID_QUAD:
>>>>> +	case CQSPI_REG_MODULEID_CONF_ID_QUAD_PHY:
>>>>
>>>> Does this work on all revisions of CQSPI ?
>>>>
>>>
>>> After having a more thorough look at specification of older IP version
>>> (quad only) it seems, that revision register format has indeed changed.
>>> This will be fixed in the next version of the patch.
>>
>> Can the quad-spi controller be configured only as dual or single ?
>> What about the octal one ? These cases should probably be handled
>> somehow too, right ?
>>
> 
> Quad-SPI controller can always support single, dual and quad. There was
> no option to configure max mode. Octal-SPI controller can be configured
> to support either octal or quad mode. No controller could be configured 
> (during hardware compilation/synthesis) to support only single/dual 
> SPI mode. To put it shortly: single, dual and quad is always supported.

So basically the whole check you need to perform here is

mode = quad;
if (controller->flags & CAN_DO_OCTAL) {
 if (readl(ID_REGISTER) & IS_CONFIGURED_AS_OCTAL)
   mode = octal;
}

-- 
Best regards,
Marek Vasut