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Date: Thu, 9 Mar 2017 20:52:51 -0800 From: Steve Longerbeam <slongerbeam@...il.com> To: robh+dt@...nel.org, mark.rutland@....com, shawnguo@...nel.org, kernel@...gutronix.de, fabio.estevam@....com, linux@...linux.org.uk, mchehab@...nel.org, hverkuil@...all.nl, nick@...anahar.org, markus.heiser@...marIT.de, p.zabel@...gutronix.de, laurent.pinchart+renesas@...asonboard.com, bparrot@...com, geert@...ux-m68k.org, arnd@...db.de, sudipm.mukherjee@...il.com, minghsiu.tsai@...iatek.com, tiffany.lin@...iatek.com, jean-christophe.trotin@...com, horms+renesas@...ge.net.au, niklas.soderlund+renesas@...natech.se, robert.jarzmik@...e.fr, songjun.wu@...rochip.com, andrew-ct.chen@...iatek.com, gregkh@...uxfoundation.org, shuah@...nel.org, sakari.ailus@...ux.intel.com, pavel@....cz Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-media@...r.kernel.org, devel@...verdev.osuosl.org, Steve Longerbeam <steve_longerbeam@...tor.com> Subject: [PATCH v5 11/39] ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_b The reset pin to the port expander chip (MAX7310) is controlled by a gpio, so define a reset-gpios property to control it. There are three MAX7310's on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for their reset. Since all can't acquire the same pin, assign it to max7310_b, that chip is needed by more functions (usb and adv7180). Signed-off-by: Steve Longerbeam <steve_longerbeam@...tor.com> --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index c8e35c4..21dea5f 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -136,6 +136,9 @@ reg = <0x32>; gpio-controller; #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_max7310>; + reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; max7310_c: gpio@34 { @@ -441,6 +444,12 @@ >; }; + pinctrl_max7310: max7310grp { + fsl,pins = < + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + >; + }; + pinctrl_pwm3: pwm1grp { fsl,pins = < MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 -- 2.7.4
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