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Message-ID: <alpine.DEB.2.20.1703121830140.3842@nanos>
Date: Sun, 12 Mar 2017 18:30:46 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Andi Kleen <ak@...ux.intel.com>
cc: Andi Kleen <andi@...stfloor.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] x86/fpu: Support disabling AVX and AVX512
On Sat, 11 Mar 2017, Andi Kleen wrote:
> On Sat, Mar 11, 2017 at 11:46:37AM +0100, Thomas Gleixner wrote:
> > > +enum xsave_features {
> > > + XSAVE_X87,
> > > + XSAVE_SSE,
> > > + XSAVE_AVX,
> > > + XSAVE_MPX_BOUNDS,
> > > + XSAVE_MPX_CSR,
> > > + XSAVE_AVX512_OPMASK,
> > > + XSAVE_AVX512_HI256,
> > > + XSAVE_AVX512_ZMM_HI256,
> > > + XSAVE_PT,
> > > + XSAVE_PKU,
> > > + XSAVE_UNKNOWN
> > > +};
> >
> > What's that enum for? It's unused ....
>
> It's not. The disable functions use it (although only the AVX parts)
Sorry, misread it.
Thanks,
tglx
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