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Message-ID: <CAAtXAHc_bdK8f3pyQ7n7J4EEXfu3fZ2TPjMcQzbRzzKpJBg1RQ@mail.gmail.com>
Date: Mon, 13 Mar 2017 13:46:53 -0700
From: Moritz Fischer <mdf@...nel.org>
To: matthew.gerlach@...ux.intel.com
Cc: Alan Tull <atull@...nel.org>, linux-fpga@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Devicetree List <devicetree@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Anatolij Gustschin <agust@...x.de>,
Alan Tull <atull@...nsource.altera.com>
Subject: Re: [PATCH v5 1/4] fpga: add config complete timeout
On Fri, Mar 10, 2017 at 11:40 AM, <matthew.gerlach@...ux.intel.com> wrote:
> From: Alan Tull <atull@...nsource.altera.com>
>
> Adding timeout for maximum allowed time for FPGA to go to
> operating mode after a FPGA region has been programmed.
>
> Signed-off-by: Alan Tull <atull@...nsource.altera.com>
Acked-by: Moritz Fischer <mdf@...nel.org>
> ---
> drivers/fpga/fpga-region.c | 3 +++
> include/linux/fpga/fpga-mgr.h | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
> index 3222fdb..28401cb 100644
> --- a/drivers/fpga/fpga-region.c
> +++ b/drivers/fpga/fpga-region.c
> @@ -381,6 +381,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
> of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
> &info->disable_timeout_us);
>
> + of_property_read_u32(nd->overlay, "config-complete-timeout-us",
> + &info->config_complete_timeout_us);
> +
> /* If FPGA was externally programmed, don't specify firmware */
> if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
> pr_err("error: specified firmware and external-fpga-config");
> diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
> index 57beb5d..fd3f083 100644
> --- a/include/linux/fpga/fpga-mgr.h
> +++ b/include/linux/fpga/fpga-mgr.h
> @@ -76,11 +76,14 @@ enum fpga_mgr_states {
> * @flags: boolean flags as defined above
> * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
> * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
> + * @config_complete_timeout_us: maximum time for FPGA to switch to operating
> + * status in the write_complete op.
> */
> struct fpga_image_info {
> u32 flags;
> u32 enable_timeout_us;
> u32 disable_timeout_us;
> + u32 config_complete_timeout_us;
> };
>
> /**
> --
> 2.7.4
>
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