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Message-ID: <alpine.DEB.2.20.1703130928400.3558@nanos>
Date:   Mon, 13 Mar 2017 09:58:50 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Dongjiu Geng <gengdongjiu@...wei.com>
cc:     benh@...nel.crashing.org, jason@...edaemon.net,
        linux-kernel@...r.kernel.org, zhanghaibin7@...wei.com,
        huangshaoyu@...wei.com
Subject: Re: [PATCH v2-kernel 4.1] irqdomain: handle the per-CPU irq trigger
 type settings

On Mon, 13 Mar 2017, Dongjiu Geng wrote:

Subject: [PATCH v2-kernel 4.1] ....

Please do not submit patches against random ancient kernel
versions. Patches need to be written against current Linus tree or against
a current subsystem maintainer tree/branch.

> when percpu devices set its IRQ trigger type using irq_of_parse

Sentences still start with upper case letters.

> and_map API,it will be failed because irq_set_irq_type is only
> for 1-N mode interrupt source,not for per-cpu interrupt source.
> so handle per-cpu IRQs for this failure.
> 
> problem: per cpu device call irq_of_parse_and_map to set its
> timer trigger type IRQ_TYPE_EDGE_RISING, irq_of_parse_and_map
> will call irq_create_of_mapping to set trigger_type through
> irq_set_irq_type. But irq_set_irq_type uses
> IRQ_GET_DESC_CHECK_GLOBAL and not IRQ_GET_DESC_CHECK_PERCPU.
> per-cpu IRQ is per-cpu and not global.

So this it the actual problem that irq_set_irq_type() does not handle
irq_set_irq_type().

> solution: storing the type into irqdata, then get this IRQ
> type fromirq_get_trigger_type, and enable_percpu_irq sets the
> type

> --- a/kernel/irq/irqdomain.c
> +++ b/kernel/irq/irqdomain.c
> @@ -542,8 +542,16 @@ unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data)
>  
>  	/* Set type if specified and different than the current one */
>  	if (type != IRQ_TYPE_NONE &&
> -	    type != irq_get_trigger_type(virq))
> -		irq_set_irq_type(virq, type);
> +	    type != irq_get_trigger_type(virq)) {
> +		int ret = 0;
> +		struct irq_data *irq_data = irq_get_irq_data(virq);
> +
> +		ret = irq_set_irq_type(virq, type);
> +
> +		 /* Handle per-cpu IRQ: just save type in irq_data */
> +		if (-EINVAL == ret && irq_data)

Once more. This 'solution' is doing that write unconditionally for any
interrupt returning -EINVAL. So how is that handling per-cpu interrupts?

Side note: Kernel coding style is: ret == -EINVAL

> +			irqd_set_trigger_type(irq_data, type);
> +	}

Just for the record: Upstream has a proper solution for this problem
already.

Thanks,

	tglx

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