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Message-ID: <CACRpkda0xsm+iN_Kxg4pB43LQ7i2MzfJgqibDAt3V5xCRinHEA@mail.gmail.com>
Date: Wed, 15 Mar 2017 10:37:12 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Nathan Sullivan <nathan.sullivan@...com>
Cc: Alexandre Courbot <gnurou@...il.com>,
Mark Rutland <mark.rutland@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
Linux MIPS <linux-mips@...ux-mips.org>
Subject: Re: [PATCH 2/2] MIPS: NI 169445 board support
On Mon, Mar 6, 2017 at 9:06 PM, Nathan Sullivan <nathan.sullivan@...com> wrote:
> Support the National Instruments 169445 board.
>
> Signed-off-by: Nathan Sullivan <nathan.sullivan@...com>
(...)
> + gpio1:gpio-controller@...00010 {
> + compatible = "ni,169445-nand-gpio";
> + reg = <0x10 0x4>;
> + reg-names = "dat";
> + gpio-controller;
> + #gpio-cells = <2>;
> + ngpios = <5>;
Here I would add:
gpio-line-names = "NC", "NCE", "ALE", "CLE", "NWP";
(Dunno about the first one, maybe you have a schematic?)
> + };
> +
> + gpio2:gpio-controller@...00014 {
> + compatible = "ni,169445-nand-gpio";
> + reg = <0x14 0x4>;
> + reg-names = "dat";
> + gpio-controller;
> + #gpio-cells = <2>;
> + ngpios = <1>;
gpio-line-names = "RDY";
> + };
> +
> + nand@...00000 {
> + compatible = "gpio-control-nand";
> + nand-on-flash-bbt;
> + nand-ecc-mode = "soft_bch";
> + nand-ecc-step-size = <512>;
> + nand-ecc-strength = <4>;
> + reg = <0x0 4>;
> + gpios = <&gpio2 0 0>, /* rdy */
> + <&gpio1 1 0>, /* nce */
> + <&gpio1 2 0>, /* ale */
> + <&gpio1 3 0>, /* cle */
> + <&gpio1 4 0>; /* nwp */
> + };
To reflect this. "lsgpio" gives better info after that.
Other than that:
Acked-by: Linus Walleij <linus.walleij@...aro.org>
Yours,
Linus Walleij
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