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Message-ID: <d5a5ba7d-4c29-8879-69cb-e1b68f7d15b2@linux.intel.com>
Date: Fri, 17 Mar 2017 10:06:27 -0700
From: sathyanarayanan kuppuswamy
<sathyanarayanan.kuppuswamy@...ux.intel.com>
To: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
Cc: andy@...radead.org, qipeng.zha@...el.com, dvhart@...radead.org,
david.e.box@...ux.intel.com, platform-driver-x86@...r.kernel.org,
linux-kernel@...r.kernel.org, shanth.murthy@...el.com
Subject: Re: [PATCH v2 1/4] platform/x86: intel_pmc_ipc: fix gcr offset
On 03/17/2017 04:13 AM, Rajneesh Bhardwaj wrote:
> On Thu, Mar 16, 2017 at 05:41:33PM -0700, Kuppuswamy Sathyanarayanan wrote:
>> According to the PMC spec, gcr offset from ipc mem
>> region is 0x1000(4K). But currently this driver uses
>> 0x1008 as gcr offset. This patch fixes this issue.
>>
> This one is fine and was one of the WIP patches. This now enables further
> cleanup and we should re-align GCR_TELEM_DEEP_S0IX_OFFSET from gcr_base.
Since S0IX_OFFSET currently does not use GCR_OFFSET as base, I think
that change is irrelevant to this fix.
I can submit another patch for S0IX_OFFSET cleanup.
>
> CC: Shanth Murthy <shanth.murthy@...el.com>
>
>> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
>> ---
>> drivers/platform/x86/intel_pmc_ipc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c
>> index 0651d47..0a33592 100644
>> --- a/drivers/platform/x86/intel_pmc_ipc.c
>> +++ b/drivers/platform/x86/intel_pmc_ipc.c
>> @@ -82,7 +82,7 @@
>> /* exported resources from IFWI */
>> #define PLAT_RESOURCE_IPC_INDEX 0
>> #define PLAT_RESOURCE_IPC_SIZE 0x1000
>> -#define PLAT_RESOURCE_GCR_OFFSET 0x1008
>> +#define PLAT_RESOURCE_GCR_OFFSET 0x1000
>> #define PLAT_RESOURCE_GCR_SIZE 0x1000
>> #define PLAT_RESOURCE_BIOS_DATA_INDEX 1
>> #define PLAT_RESOURCE_BIOS_IFACE_INDEX 2
>> --
>> 2.7.4
>>
--
Sathyanarayanan Kuppuswamy
Android kernel developer
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