linux-kernel - Re: [PATCH] clk: tegra: rework pll

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20170320132021.GH22463@ulmo.ba.sec>
Date:   Mon, 20 Mar 2017 14:20:21 +0100
From:   Thierry Reding <thierry.reding@...il.com>
To:     Peter De Schrijver <pdeschrijver@...dia.com>
Cc:     Prashant Gaikwad <pgaikwad@...dia.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Stephen Warren <swarren@...dotorg.org>,
        Alexandre Courbot <gnurou@...il.com>,
        linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: tegra: rework pll_u

On Tue, Mar 14, 2017 at 04:12:49PM +0200, Peter De Schrijver wrote:
> In normal operation pll_u is under hardware control and has a fixed rate of
> 480MHz. Hardware will turn on pll_u on whenever any of the XUSB
> powerdomains is on. From a software point of view we model this is if pll_u
> is always on using a fixed rate clock. However the bootloader might or
> might not have configured pll_u this way. So we will check the current
> state of pll_u at boot and reconfigure it if required.
> 
> There are 3 possiblities at kernel boot:
> 1) pll_u is under hardware control: do nothing
> 2) pll_u is under hardware control and enabled: enable hardware control
> 3) pll_u is disabled: enable pll_u and enable hardware control
> 
> In all cases we also check if UTMIPLL is under hardware control at boot
> and configure it for hardware control if that is not the case.
> The same is done during SC7 resume.
> 
> Thanks to Joseph Lo <josephl@...dia.com> for bug fixes.
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@...dia.com>
> ---
>  drivers/clk/tegra/clk-pll.c      | 174 -----------------------
>  drivers/clk/tegra/clk-tegra210.c | 295 ++++++++++++++++++++++++++++++++++++---
>  2 files changed, 272 insertions(+), 197 deletions(-)

Applied, thanks.

Do you think this actually fixes a bug? We've had a long standing issue
with booting Debian on a Jetson TX1 which is due to some USB related PLL
failing to lock. This sounds like it could fix that particular issue.

Thierry

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)