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Message-ID: <20170321165349.GB21222@n2100.armlinux.org.uk>
Date: Tue, 21 Mar 2017 16:53:50 +0000
From: Russell King - ARM Linux <linux@...linux.org.uk>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>,
Will Deacon <will.deacon@....com>,
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Pratyush Anand <pratyush.anand@...il.com>,
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Mingkai Hu <mingkai.hu@...escale.com>,
John Garry <john.garry@...wei.com>,
Tanmay Inamdar <tinamdar@....com>,
Murali Karicheri <m-karicheri2@...com>,
Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>,
Ray Jui <rjui@...adcom.com>,
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Shawn Lin <shawn.lin@...k-chips.com>,
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Roy Zang <tie-fei.zang@...escale.com>
Subject: Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface
On Tue, Mar 21, 2017 at 03:26:36PM +0000, Lorenzo Pieralisi wrote:
> I assumed that in plain terms, the difference between MT_DEVICE and
> MT_UNCACHED is write posting (aka bufferable) behaviour (across CPU
> architecture versions) and that does not affect write ordering rules.
Having looked it up in the ARM ARM, I think we're fine. Device and
strongly ordered accesses are both ordered as one group, so can be
thought of as the same. The only difference is that Device can
complete from the CPU's perspective before it hits the peripheral,
whereas strongly ordered only completes once it's hit the peripheral.
So this looks like exactly the right thing to do here.
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