linux-kernel - [PATCH v3 09/11] ARM: dtsi: sun8i: a33: add CPU thermal throttling

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Message-Id: <20170321153611.16228-10-quentin.schulz@free-electrons.com>
Date:   Tue, 21 Mar 2017 16:36:09 +0100
From:   Quentin Schulz <quentin.schulz@...e-electrons.com>
To:     dmitry.torokhov@...il.com, robh+dt@...nel.org,
        mark.rutland@....com, maxime.ripard@...e-electrons.com,
        wens@...e.org, lee.jones@...aro.org, linux@...linux.org.uk,
        jic23@...nel.org, knaack.h@....de, lars@...afoo.de,
        pmeerw@...erw.net
Cc:     Quentin Schulz <quentin.schulz@...e-electrons.com>,
        thomas.petazzoni@...e-electrons.com, linux-input@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-iio@...r.kernel.org,
        linux-sunxi@...glegroups.com, icenowy@...c.xyz
Subject: [PATCH v3 09/11] ARM: dtsi: sun8i: a33: add CPU thermal throttling

This adds CPU thermal throttling for the Allwinner A33. It uses the
thermal sensor present in the SoC's GPADC.

Signed-off-by: Quentin Schulz <quentin.schulz@...e-electrons.com>
---

v3:
  - switched to new phandle because of modified DT node name for the GPADC
  (named THS),
  - got rid of cooling-min-level and cooling-max-level as it's not used in any
  code in the kernel,

v2:
  - updated cooling-max-level to reflect newly added OPPs,

 arch/arm/boot/dts/sun8i-a33.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index f391f71..73552bb 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -43,6 +43,7 @@
  */
 
 #include "sun8i-a23-a33.dtsi"
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	cpu0_opp_table: opp_table0 {
@@ -127,6 +128,7 @@
 			clocks = <&ccu CLK_CPUX>;
 			clock-names = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
+			#cooling-cells = <2>;
 		};
 
 		cpu@1 {
@@ -170,6 +172,49 @@
 		};
 	};
 
+	thermal-zones {
+		cpu_thermal {
+			/* milliseconds */
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+			thermal-sensors = <&ths>;
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert0>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+				map1 {
+					trip = <&cpu_alert1>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+
+			trips {
+				cpu_alert0: cpu_alert0 {
+					/* milliCelsius */
+					temperature = <75000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu_alert1: cpu_alert1 {
+					/* milliCelsius */
+					temperature = <90000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+
+				cpu_crit: cpu_crit {
+					/* milliCelsius */
+					temperature = <110000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+	};
+
 	memory {
 		reg = <0x40000000 0x80000000>;
 	};
-- 
2.9.3