linux-kernel - Re: [PATCH v3 4/4] drm/rockchip/dsi: correct the grf_switch_reg name

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Date:   Tue, 21 Mar 2017 16:17:25 -0400
From:   Sean Paul <seanpaul@...omium.org>
To:     Chris Zhong <zyw@...k-chips.com>
Cc:     linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        dri-devel@...ts.freedesktop.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 4/4] drm/rockchip/dsi: correct the grf_switch_reg name

On Fri, Mar 17, 2017 at 11:54:24AM +0800, Chris Zhong wrote:
> For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
> not RK3399_GRF_SOC_CON19.
> 
> Signed-off-by: Chris Zhong <zyw@...k-chips.com>

Reviewed-by: Sean Paul <seanpaul@...omium.org>

> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index 5a18281..19b9208 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -34,7 +34,7 @@
>  #define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
>  #define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
>  
> -#define RK3399_GRF_SOC_CON19		0x6250
> +#define RK3399_GRF_SOC_CON20		0x6250
>  #define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
>  #define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
>  
> @@ -1151,7 +1151,7 @@ static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
>  static struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
>  	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
>  	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
> -	.grf_switch_reg = RK3399_GRF_SOC_CON19,
> +	.grf_switch_reg = RK3399_GRF_SOC_CON20,
>  	.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
>  	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
>  	.flags = DW_MIPI_NEEDS_PHY_CFG_CLK | DW_MIPI_NEEDS_GRF_CLK,
> -- 
> 2.6.3
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@...ts.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Sean Paul, Software Engineer, Google / Chromium OS

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