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Message-ID: <CAK7LNATT9uz+vqRx6Fndyxm=TeVVRseM1rsA+8tNw7un5bkB6A@mail.gmail.com>
Date:   Thu, 23 Mar 2017 10:54:08 +0900
From:   Masahiro Yamada <yamada.masahiro@...ionext.com>
To:     Boris Brezillon <boris.brezillon@...e-electrons.com>
Cc:     linux-mtd@...ts.infradead.org, laurent.monat@...uantique.com,
        thorsten.christiansson@...uantique.com,
        Enrico Jorns <ejo@...gutronix.de>,
        Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
        Dinh Nguyen <dinguyen@...nel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Graham Moore <grmoore@...nsource.altera.com>,
        David Woodhouse <dwmw2@...radead.org>,
        Masami Hiramatsu <mhiramat@...nel.org>,
        Chuanxiao Dong <chuanxiao.dong@...el.com>,
        Jassi Brar <jaswinder.singh@...aro.org>,
        devicetree@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Brian Norris <computersforpeace@...il.com>,
        Richard Weinberger <richard@....at>,
        Cyrille Pitchen <cyrille.pitchen@...el.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [RESEND PATCH v2 00/53] mtd: nand: denali: 2nd round of Denali
 NAND IP patch bomb

Hi Boris,


2017-03-23 6:35 GMT+09:00 Boris Brezillon <boris.brezillon@...e-electrons.com>:
> Hi Masahiro,
>
> On Thu, 23 Mar 2017 05:06:59 +0900
> Masahiro Yamada <yamada.masahiro@...ionext.com> wrote:
>
>> It took a couple months to update this series, but finally here is v2.
>> (v1: https://lkml.org/lkml/2016/11/26/144 )
>>
>> This driver includes many problems.
>>
>> One of the biggest one is a bunch of hard-coded parameters.  This IP
>> has many parameters that can be customized when a delivery RTL is
>> generated.  However, this driver was upstreamed by Intel, with
>> Intel parameters hard-coded.  Later, Altera added denali_dt.c to use
>> this driver for embedded boards, but they did not fix the code in
>> denali.c  So, this driver has never worked.  Even some DT bindings
>> actually turned out wrong.
>>
>> There are more problems: [1] The driver just retrieves the OOB area as-is
>> whereas the controller uses syndrome page layout. [2] Many NAND chip
>> specific parameters are hard-coded in the driver. [3] ONFi devices are
>> not working  [4] It can not read Bad Block Marker
>>
>> This patch series intends to solve those problems.
>>
>> Since v1, here are more fixes/improvements:
>>  - Fix raw/oob callbacks for syndrome page layout
>>  - Implement setup_data_interface() callback
>>  - Fix/implement more commands for ONFi devices
>>  - Allow to skip the driver internal bounce buffer
>>  - Support PIO in case DMA is not supported
>>  - Switch from ->cmdfunc over to ->cmd_ctrl
>
> I'll probably pick a few patches for 4.12, so please wait a bit before
> sending a v4.


This will be helpful.

I was refused by the SMTP server I use
(probably due to too much volume at once).




Please check the following as well.

>>   mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp)
>>   mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp)

I noticed them when I switched from ->cmdfunc to ->cmd_ctrl hook.



-- 
Best Regards
Masahiro Yamada

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