linux-kernel - [PATCH v2 0/8] bus: brcmstb_gisb: add support for GISBv7 arbiter

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20170328213431.10904-1-opendmb@gmail.com>
Date:   Tue, 28 Mar 2017 14:34:23 -0700
From:   Doug Berger <opendmb@...il.com>
To:     mark.rutland@....com
Cc:     robh+dt@...nel.org, catalin.marinas@....com, will.deacon@....com,
        computersforpeace@...il.com, gregory.0xf0@...il.com,
        f.fainelli@...il.com, bcm-kernel-feedback-list@...adcom.com,
        opendmb@...il.com, wangkefeng.wang@...wei.com, james.morse@....com,
        mingo@...nel.org, sandeepa.s.prabhu@...il.com,
        shijie.huang@....com, linus.walleij@...aro.org, treding@...dia.com,
        jonathanh@...dia.com, olof@...om.net, mirza.krak@...il.com,
        suzuki.poulose@....com, bgolaszewski@...libre.com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v2 0/8] bus: brcmstb_gisb: add support for GISBv7 arbiter

This patch set contains changes to enable the GISB arbiter driver
on the latest ARM64 architecture Set-Top Box chips from Broadcom.

This driver relies on being able to hook the abort handlers of
the processor core that are triggered by bus error signals
generated by the GISB bus arbiter hardware found in BCM7XXX chips.
The first two patches are based on the arm64/for-next/core
branch to enable this functionality for the arm64 architecture.

The remaining patches correct some issues with the existing driver,
add the ARM64 architecture specific support to the driver, and
finally add the new register map for the GISBv7 hardware first
appearing in the BCM7278 device.

Changes since v1 at [1]:
 - Removed code associated with hooking SError handling in favor
   of a registered notifier (Thanks Mark!)
 - Removed an unnecessary explicit cast (Thanks Gregory!)

[1] https://lkml.org/lkml/2017/3/24/413

Doug Berger (6):
  arm64: mm: mark fault_info __ro_after_init
  bus: brcmstb_gisb: Use register offsets with writes too
  bus: brcmstb_gisb: Correct hooking of ARM aborts
  bus: brcmstb_gisb: correct support for 64-bit address output
  bus: brcmstb_gisb: add notifier handling
  bus: brcmstb_gisb: update to support new revision

Florian Fainelli (2):
  arm64: mm: Allow installation of memory abort handlers
  bus: brcmstb_gisb: Add ARM64 support

 .../devicetree/bindings/bus/brcm,gisb-arb.txt      |   3 +-
 arch/arm64/include/asm/system_misc.h               |   3 +
 arch/arm64/mm/fault.c                              |  17 +++-
 drivers/bus/Kconfig                                |   2 +-
 drivers/bus/brcmstb_gisb.c                         | 111 ++++++++++++++++-----
 5 files changed, 106 insertions(+), 30 deletions(-)

-- 
2.12.0