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Message-ID: <1490692375.3177.119.camel@kernel.crashing.org>
Date: Tue, 28 Mar 2017 20:12:55 +1100
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Marc Zyngier <marc.zyngier@....com>,
Brendan Higgins <brendanhiggins@...gle.com>, wsa@...-dreams.de,
robh+dt@...nel.org, mark.rutland@....com, tglx@...utronix.de,
jason@...edaemon.net, joel@....id.au, vz@...ia.com, mouse@...c.ru,
clg@...d.org
Cc: linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: Re: [PATCH v6 2/5] irqchip/aspeed-i2c-ic: Add I2C IRQ controller
for Aspeed
On Tue, 2017-03-28 at 09:32 +0100, Marc Zyngier wrote:
> I'm a bit concerned by this. It means that you can't even mask an
> interrupt. Is that really what you intend to do? Or all that the HW can
> do? If you cannot mask an interrupt, you're at the mercy of a screaming
> device...
This is not really an interrupt controller. It's a "summary" register
that reflects the state of the 14 i2c controller interrupts.
This approach does have the advantage of providing separate counters in
/proc/interrupts which is rather nice, but it does have overhead. On
those shittly little ARMv9 400Mhz cores it can be significant.
I would personally have some kind of trick to register a single
interrupt handler that calls directly the handlers of the respective
i2c busses via a simple indirection for speed, maybe adding my custom
sysfs or debugfs statistics. But that's just me trying to suck the last
cycle out of the bloody thing ;-)
Cheers,
Ben.
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